參數(shù)資料
型號: Z86L70
廠商: ZiLOG, Inc.
英文描述: IR/Low-Voltage Microcontroller
中文描述: 紅外/低電壓微控制器
文件頁數(shù): 11/61頁
文件大?。?/td> 349K
代理商: Z86L70
Z86L70/71/75/C71
Zilog
IR/Low-Voltage Microcontroller
DS97LVO0500
P R E L I M I N A R Y
1-11
1
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Table
T
A
= 0
°
C to +70
°
C
8.0 MHz
Min
55
55
70
70
No
1
Symbol
TdA(AS)
Parameter
V
CC
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
Address Valid to /AS
Rising Delay
/AS Rising to Address
Float Delay
/AS Rising to Read
Data Required Valid
/AS Low Width
2
TdAS(A)
2
3
TdAS(DR)
400
400
1,2
4
TwAS
80
80
0
0
300
300
165
165
2
5
Td
Address Float to /DS
Falling
/DS (Read) Low Width
6
TwDSR
1,2
7
TwDSW
/DS (Write) Low Width
1,2
8
TdDSR(DR)
/DS Falling to Read
Data Required Valid
Read Data to
/DS Rising Hold Time
/DS Rising to Address
Active Delay
/DS Rising to /AS
260
260
1,2
9
ThDR(DS)
0
0
2
10
TdDS(A)
85
85
60
70
70
70
70
70
80
80
2
11
TdDS(AS)
2
12
TdR/W(AS)
R//W Valid to /AS
Rising Delay
/DS Rising to
R//W Not Valid
Write Data Valid to
/DS Falling (Write)
Delay
/DS Rising to Write
Data Not Valid Delay
Address Valid to Read
Data Required Valid
/AS Rising to /DS
Falling Delay
/DM Valid to /AS
Falling Delay
/DS Rise to /DM Valid
Delay
/DS Rise to Address
Valid Hold Time
2
13
TdDS(R/W)
2
14
TdDW(DSW)
2
15
TdDS(DW)
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
2.0V
3.9V
70
80
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
16
TdA(DR)
475
475
1,2
17
TdAS(DS)
100
100
55
55
70
70
70
70
2
18
TdM(AS)
2
19
TdDS(DM)
20
ThDS(A)
Notes:
1. When using extended memory timing add 2 TpC.
2. Timing numbers given are for minimum TpC.
Standard Test Load
All timing references use 0.9 V
CC
for a logic 1 and 0.1 V
CC
for a logic 0.
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