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參數資料
| 型號： | XRT91L81IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數字傳輸電路 |
| 英文描述： | 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| 中文描述： | TRANSCEIVER, PBGA196 |
| 封裝： | 12 X 12 MM, STBGA-196 |
| 文件頁數： | 16/40頁 |
| 文件大小： | 264K |
| 代理商： | XRT91L81IB |
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XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
PRELIMINARY
14
2.2
The clock and data recovery unit accepts the high speed NRZ serial data from the differential CML receiver
and generates a clock that is the same frequency as the incoming data. The clock recovery utilizes the
REFCLKP/N to train and monitor its clock recovery PLL. Initially upon startup, the PLL locks to the reference
clock. Once this is achieved, the PLL then attempts to lock onto the incoming receive data stream. Whenever
the recovered clock frequency deviates from the local reference clock frequency by more than approximately
500 ppm, the clock recovery PLL will switch and lock back onto the local reference clock. When this condition
occurs the PLL will declare Loss of Lock and the LOCKDET_CDR signal will be pulled low. A Loss of Lock
condition will also be declared when the external LOSEXT is asserted. Whenever a loss of lock/loss of signal
event occurs, the CDR will continue to supply a receive clock (based on the local reference) to the upstream
framer device. When the DISRD control is enabled, receive parallel output data will be forced to an all zeroes
condition for the entire duration that a LOS condition is detected. This acts as a receive data mute upon LOS
function to prevent random noise from being misinterpreted as valid incoming data. When the LOSEXT
becomes inactive and the recovered clock is determined to be within 500 ppm accuracy with respect to the
local reference source, the lock detect output (LOCKDET_CDR) will go active.
2.3
Loss Of Signal
XRT91L81 supports external loss of signal detection (LOS). The external LOS function is supported by the
LOSEXT input. The TTL input is coming from the optical module through an output usually called “SD” or
“FLAG” which indicates the lack or presence of optical power. Depending on the manufacturer of these devices
the polarity of this signal can be either active low or active high. The LOSEXT and POLARITY inputs are
Exclusive NORed to generate the external loss control signal with the correct polarity. Whenever an external
LOS is detected, the XRT91L81 will automatically output a high level signal on the LOSDET output pin as well
as update the control registers whenever the host mode serial microprocessor interface feature is active.
2.4
Receive Serial Input to Parallel Output (SIPO)
The SIPO is used to convert the 2.488/2.666GHz serial input data to 622/666MHz parallel output data which
can interface to a SONET Framer/ASIC. The SIPO bit de-interleaves the serial input data into a 4-bit parallel
output to RXD3P/N. A simplified block diagram is shown in Figure 4.
Receive Clock and Data Recovery
F
IGURE
4. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
SIPO
b
0
0
b
0
1
b
0
2
b
0
3
b
1
0
b
1
1
b
1
2
b
1
3
b
2
0
b
2
1
b
2
2
b
2
3
b
3
0
b
3
1
b
3
2
b
3
3
4-bit Parallel LVDS Output Data
RXD0P/N
RXD3P/N
RXD2P/N
RXD1P/N
RXI0P/N
RXCLKP/N
622MHz
b
3
0 b
2
0 b
1
0 b
0
0
b
3
1 b
2
1 b
1
1 b
0
1
b
3
2 b
2
2 b
1
2 b
0
2
b
0
3
b
1
3
b
2
3
b
3
3
2.488GHz
S
相關PDF資料 |
PDF描述 |
|---|---|
| XRT91L82 | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82IB | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT94L31_07 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
| XRT94L31IB | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| XRT91L82 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82ES | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB-F | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT94L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
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