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參數(shù)資料
| 型號(hào)： | XRT91L80IB-F |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 1/46頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX SONET/SDH 4BIT 196STBGA |
| 產(chǎn)品變化通告： | XRT91L80IB Obsolescence 6/Sept/2010 |
| 標(biāo)準(zhǔn)包裝： | 126 |
| 類型： | 收發(fā)器 |
| 規(guī)程： | SONET/SDH |
| 電源電壓： | 3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 196-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 196-STBGA（12x12） |
| 包裝： | 托盤 |
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
JANUARY 2007
REV. 1.0.0
GENERAL DESCRIPTION
The XRT91L80 is a fully integrated SONET/SDH
transceiver for SONET OC-48/STM-16 applications
supporting the use of Forward Error Correction (FEC)
capability. The transceiver includes an on-chip Clock
Multiplier Unit (CMU), which uses a high frequency
Phase-Locked Loop (PLL) to generate the high-
speed transmit serial clock from a slower external
clock reference. It also provides Clock and Data
Recovery (CDR) functions by synchronizing its on-
chip Voltage Controlled Oscillator (VCO) to the
incoming serial data stream. The chip provides serial-
to-parallel and parallel-to-serial converters and 4-bit
LVDS system interfaces in both receive and transmit
directions. The transmit section includes a 4x9 Elastic
Buffer (FIFO) to absorb any phase differences
between the transmitter clock input and the internally
generated transmitter reference clock. In the event of
an overflow, an internal FIFO control circuit outputs
an OVERFLOW indication. The FIFO under the
control of the FIFO_AUTORST pin can automatically
recover from an overflow condition. The operation of
the device can be monitored by checking the status of
the
LOCKDET_CMU,
LOCKDET_CDR,
and
LOSDET output signals. An on-chip phase/frequency
detector and charge-pump offers the ability to form a
de-jittering PLL with an external VCXO that can be
used in loop timing mode to clean up the recovered
clock in the receive section.
APPLICATIONS
SONET/SDH-based Transmission Systems
Add/Drop Multiplexers
Cross Connect Equipment
ATM and Multi-Service Switches and Routers
DSLAMS
SONET/SDH Test Equipment
DWDM Termination Equipment
FIGURE 1. BLOCK DIAGRAM OF XRT91L80
PISO
(Parallel Input
Serial Output)
PFD
& Charge Pump
TXDI0P/N
S
C
L
K
S
D
I
Serial
Microprocessor
Hardware
Control
IN
T
S
D
O
R
E
S
E
T
H
O
S
T
/H
W
R
L
O
P
S
D
L
O
P
R
L
O
P
L
O
P
T
M
_
J
A
L
O
P
T
M
_
N
O
J
A
TXDI1P/N
TXDI2P/N
TXDI3P/N
TXPCLKIP/N
DLOOP
RLOOPP
RXDO0P/N
RXDO1P/N
RXDO2P/N
RXDO3P/N
4
x
9
F
IF
O
WP
RP
RLOOPS
CDR
Re-Timer
CMU
TXOP/N
RXIP/N
R
E
F
C
L
K
P
/N
V
C
X
O
_
IN
P
/N
A
L
T
F
R
E
Q
S
E
L
V
C
X
O
_
S
E
L
V
C
X
O
_
L
O
C
K
E
N
V
C
X
O
_
L
O
C
K
C
P
O
U
T
L
O
P
B
W
TXPCLKOP/N
TXCLKO16P/N
TXCLKO16DIS
L
O
C
K
D
E
T
_
C
M
U
O
V
E
R
F
L
O
W
FIFO_RST
FIFO_AUTORST
LOSDMUTE
L
O
C
K
D
E
T
_
C
D
R
L
O
S
D
E
T
S
D
E
X
T
P
O
L
A
R
IT
Y
DISRD
STS-48 TRANSCEIVER
C
S
T
E
S
T
JTAG
TDO
TDI
TCK
TMS
TRST
Div by 4
Div by 16
RXPCLKOP/N
RXCLKO16P/N
Div by 4
Div by 16
SIPO
(Serial Input
Parallel Output)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L81 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L81IB | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L82ES | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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