參數(shù)資料
型號： XRT86VL34IB
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： DATACOM, FRAMER, PBGA225
封裝： 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-225
文件頁數(shù)： 47/156頁
文件大小： 816K
代理商： XRT86VL34IB
XRT86VL34
42
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
28: T
RANSMIT
I
NTERFACE
C
ONTROL
R
EGISTER
(TICR) H
EX
A
DDRESS
:0
X
n120
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
TxSyncFrD
R/W
0
Tx Synchronous fraction data interface
This bit selects whether TxCHCLK or TxSERCLK will be used for fractional
data input if fractional interface is enabled. If TxSERCLK is selected to clock in
fractional data input, TxCHCLK will be used as an enable signal
0 = Fractional data Is clocked into the chip using TxChCLK if fractional data
interface is enabled.
1 = Fractional data is clocked into the chip using TxSerClk. TxChClk is used
as fractional data enable.
N
OTE
:
The Time Slot Identifier Pins (TxChn[4:0]) still indicates the time slot
number if fractional data interface is not enabled. Fractional Interface
can be enabled by setting TxFr1544 to 1
6
Reserved
-
-
Reserved
5
TxPLClkEnb/
TxSync Is Low
R/W
0
Transmit payload clock enable/TxSYNC is Active Low
This exact function of this bit depends on whether the T1 framer is configured
to operate in base rate or high speed modes of operation.
If the T1 framer is configured to operate in base rate - TxPayload Clock:
This bit configures the framer to output a regular clock or a payload clock on
the transmit serial clock (TxSERCLK) pin when TxSERCLK is configured to be
an output.
0 = Configures the framer to output a 1.544MHz clock on the TxSERCLK pin
when TxSERCLK is configured as an output.
1 = Configures the framer to output a 1.544MHz clock on the TxSERCLK pin
when transmitting payload bits. There will be gaps on the TxSERCLK output
pin when transmitting overhead bits.
If the T1 framer is configured to operate in high-speed or multiplexed
modes - TxSYNC is Active Low:
This bit is used to select whether the transmit frame boundary (TxSYNC) is
active low or active high.
0 = Selects TxSync to be active “High”
1 = Selects TxSync to be active “Low”
相關(guān)PDF資料
PDF描述
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL34IB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4-Ch T1/E1/J1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL38_1 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL38_2 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
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