參數(shù)資料
型號(hào): XRT81L27IV
廠商: Exar Corporation
文件頁(yè)數(shù): 18/30頁(yè)
文件大?。?/td> 0K
描述: IC LIU EI 7CH 3.3V 128TQFP
標(biāo)準(zhǔn)包裝: 72
應(yīng)用: DECT
接口: 串行
電源電壓: 3.3V
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 托盤
安裝類型: 表面貼裝
á
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
23
3.0
THE RECEIVE SECTION
The Receive Sections of the XRT81L27 consists of
the following blocks:
The Receive Equalizer block
The Peak Detector and Slicer block
The LOS Detector block
The Receive Output Interface block
3.1
INTERFACING THE RECEIVE SECTIONS TO THE
LINE
The design of each channel (within the XRT81L27)
permits the user to transformer-couple or capacitive-
couple the Receive Section to the line. Additionally,
as mentioned earlier, the specification documents for
E1 specify 75
termination loads, when transmitting
over coaxial cable, and 120
loads, when transmit-
ting over twisted-pair. Figure 13, Figure 14 and
Figure 15 present the various methods that can be
employ to interface the Receivers (of the XRT81L27)
to the line. The receive circuits of Figure 13,
Figure 14 and Figure 15 differ in the impedance at the
inputs and the line connections.
FIGURE 12. ILLUSTRATION OF HOW TO INTERFACE THE TRANSMIT SECTIONS OF THE XRT81L27 TO THE LINE (FOR
75 OR 120
APPLICATIONS)
TPOS_n
TNEG_n
TClk_n
XRT81L27
TTIP_n
TRING_n
9.1
9.1
1:2
Line
Input
75
Coax
120
Twisted
Pair
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