參數(shù)資料
型號: XRT75R12D
廠商: Exar Corporation
英文描述: TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: 第十二章通道E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù): 55/131頁
文件大小: 717K
代理商: XRT75R12D
PRELIMINARY
XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. P1.0.1
50
7.3
Register Map
T
ABLE
16: C
OMMAND
R
EGISTER
A
DDRESS
M
AP
,
WITHIN
THE
XRT75R12D
A
DDRESS
(H
EX
)
C
OMMAND
R
EGISTER
(D
ECIMAL
)
L
ABEL
T
YPE
R
EGISTER
N
AME
0x00
CR0
APST
R/W
APS Transmit Redundancy Control Register 0-5
C
HANNEL
0 C
ONTROL
R
EGISTERS
0x01
CR1
IER0
R/W
Source Level Interrupt Enable Register - Ch 0
0x02
CR2
ISR0
RUR
Source Level Interrupt Status Register Ch 0
0x03
CR3
AS0
R/O
Alarm Status Register - Ch 0
0x04
CR4
TC0
R/W
Transmit Control Register - Ch 0
0x05
CR5
RC0
R/W
Receive Control Register - Ch 0
0x06
CR6
CC0
R/W
Channel Control Register - Ch 0
0x07
CR7
JA0
R/W
Jitter Attenuator Control Register - Ch 0
0x08
CR8
APSR
R/W
APS Receive Redundancy Control Register 0-5
0x09
0x0A
CR10
EM0
R/W
Error counter MS Byte Ch 0
0x0B
CR11
EL0
R/W
Error counter LS Byte
0x0C
CR12
EH0
R/W
Error counter Holding register
0x0D
0x0E
0x0F
0x10
C
HANNEL
1 C
ONTROL
R
EGISTERS
0x11
CR17
IER1
R/W
Source Level Interrupt Enable Register - Ch 1
0x12
CR18
ISR1
RUR
Source Level Interrupt Status Register - Ch 1
0x13
CR19
AS1
R/O
Alarm Status Register - Ch 1
0x14
CR20
TC0
R/W
Transmit Control Register - Ch 1
0x15
CR21
RC1
R/W
Receive Control Register - Ch 1
0x16
CR22
CC1
R/W
Channel Control Register - Ch 1
0x17
CR23
JA1
R/W
Jitter Attenuator Control Register - Ch 1
0x18
0x19
0x1A
CR26
EM1
R/W
Error counter MSByte Ch 1
0x1B
CR27
EL1
R/W
Error counter LSbyte
0x1C
CR28
EH1
R/W
Error counter Holding register
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