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參數(shù)資料
| 型號(hào)： | XRT75R06IB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 5/63頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 6CH 217BGA |
| 標(biāo)準(zhǔn)包裝： | 126 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 6/6 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 217-BBGA |
| 供應(yīng)商設(shè)備封裝： | 217-BGA（23x23） |
| 包裝： | 托盤 |
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XRT75R06
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.0
10
C9
T8
D12
R11
C11
R9
RLOL_0
RLOL_1
RLOL_2
RLOL_3
RLOL_4
RLOL_5
O
Receive Loss of Lock - Channel 0:
Receive Loss of Lock - Channel 1:
Receive Loss of Lock - Channel 2:
Receive Loss of Lock - Channel 3:
Receive Loss of Lock - Channel 4:
Receive Loss of Lock - Channel 5:
This output pin toggles "High" if a Loss of Lock Condition is detected. LOL
(Loss of Lock) condition occurs if the recovered clock frequency deviates from
the Reference Clock frequency (available at either E3CLK or DS3CLK or STS-
1CLK input pins) by more than 0.5%.
L16
RXA
****
External Resistor of 3.01K
± 1%.
Should be connected between RxA and RxB for internal bias.
K16
RXB
****
External Resistor of 3.01K
±1%.
Should be connected between RxA and RxB for internal bias.
P12
ICT
I
In-Circuit Test Input:
Setting this pin "Low" causes all digital and analog outputs to go into a high-
impedance state to allow for in-circuit testing. For normal operation, tie this pin
"High".
NOTE: This pin is internally pulled up.
R12
TEST
****
Factory Test Pin
NOTE: This pin must be connected to GND for normal operation.
MICROPROCESSOR INTERFACE
LEAD #
SIGNAL NAME
TYPE
DESCRIPTION
K3
CS
I
Chip Select
Tie this “Low” to enable the communication with the Microprocessor Interface.
R1
PCLK
I
Processor Clock Input
To operate the Microprocessor Interface, appropriate clock frequency is pro-
vided through this pin. Maximum frequency is 66 Mhz.
K2
WR
I
Write Data :
To write data into the registers, this active low signal is asserted.
L2
RD
I
Read Data:
To read data from the registers, this active low pin is asserted.
J3
RESET
I
Register Reset:
Setting this input pin "Low" resets the contents of the Command Registers to
their default settings and default operating configuration
NOTE: This pin is internally pulled up.
L3
PMODE
I
Processor Mode Select:
When this pin is tied “High”, the microprocessor is operating in synchronous
mode which means that clock must be applied to the PCLK (pin 55).
Tie this pin “Low” to select the Asynchronous mode. An internal clock is pro-
vided for the microprocessor interface.
CONTROL AND ALARM INTERFACE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R06IB208 | 制造商:Exar Corporation 功能描述:Line Interface Unit 51.84Mbps DS3/E3/STS-1 Parallel 217-Pin BGA |
| XRT75R06IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 6 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R12 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75R12_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75R12_0710 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
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