參數(shù)資料
型號: XRT75L04IVTR-F
廠商: Exar Corporation
文件頁數(shù): 46/57頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 4CH 176LQFP
標準包裝: 1,000
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 176-LQFP
供應商設備封裝: 176-TQFP(24x24)
包裝: 帶卷 (TR)
XRT75L04
48
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
0x07 (Ch 0)
0x0F (Ch 1)
0x17 (Ch 2)
0x1F (ch 3)
R/W
Jitter
Attenuator
D0
JA0_n
This bit along with JA1_n bit configures the Jitter
Attenuator as shown in the table below.
0
D1
JATx/Rx_n Setting this bit selects the Jitter Attenuator in the
Transmit Path. A “0” selects in the Receive Path.
0
D2
JA1_n
This bit along with the JA0_n configures the Jitter
Attenuator as shown in the table.
0
D3
PNTRST_n Setting this bit resets the Read and Write pointers of
the jitter attenuator FIFO.
0
D4
DFLCK_n
Set this bit to “1” to disable fast locking of the PLL.
This helps to reduce the time for the PLL to lock to
incoming frequeny when Jitter Attenuator switches
to narrow band.
0
D7-D5
Reserved
0x30 (Ch 0)
0x32 (Ch 1)
0x34 (Ch 2)
0x36 (ch 3)
RO
PRBS
COUNT
REG
PRBS COUNT REGISTER MSB
0
0x31 (Ch 0)
0x33 (Ch 1)
0x35 (Ch 2)
0x37 (ch 3)
RO
PRBS
COUNT
REG
PRBS COUNT REGISTER LSB
0
0x38
RO
PRBS
HOLDING
REG
PRBS HOLDING REGISTER
0
0x08
0x10
0x18
Reserved
TABLE 21: REGISTER MAP DESCRIPTION
ADDRESS
(HEX)
TYPE
REGISTER
NAME
BIT#
SYMBOL
DESCRIPTION
DEFAULT
VALUE
JA0_n
0
Mode
16 bit FIFO
32 bit FIFO
JA1_n
0
1
Disable Jitter
Attenuator
0
1
Disable Jitter
Attenuator
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