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參數(shù)資料
| 型號： | XRT75L02IVTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 5/50頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 2CH 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 2/2 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
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XRT75L02
xr
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
REV. 1.0.3
11
MODE SELECT
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
2
24
E3_0
E3_1
I
E3 Mode Select Input
A "High" on this pin configures in E3 mode.
A "Low" on this pin configures in either STS-1 or DS3 mode depending on the
settings on pins 3 and 23..
NOTES:
1.
This pin is internally pulled down
2.
This pin is ignored if configured to operate in HOST mode.
3
23
STS1/DS3 _0
STS1/DS3 _1
I
STS-1/DS3 Select Input
A “High” on these pins configures in STS-1 mode.
A “Low” on these pins configures in DS3 mode.
These pins are ignored if the E3_n pins are set to “High”.
NOTES:
1.
This pin is internally pulled down
2.
This pin is ignored if configured to operate in HOST mode.
26
HOST/HW
I
Host/Hardware Mode:
Tie this pin “High” to configure in Host mode and “Low” for Hardware mode.
100
SR/DR
I
Single-Rail/Dual-Rail Select:
Setting this “High” configures both the Transmitter and Receiver to operate in
Single-rail mode and also enables the B3ZS/HDB3 Encoder and Decoder. In
Single-rail mode, TNEG_n pin should be grounded.
Setting this “Low” configures both the Transmitter and Receiver to operate in
Dual-rail mode and disables the B3ZS/HDB3 Encoder and Decoder.
NOTE: This pin is internally pulled down.
MICROPROCESSOR SERIAL INTERFACE - (HOST MODE)
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
29
CS
RxCLKINV
I
Microprocessor Serial Interface - Chip Select
Tie this “Low” to enable the communication with the Microprocessor Serial Inter-
face.
NOTE: If configured in Hardware Mode, this pin functions as RxClkINV.
30
SCLK
TxCLKINV
I
Serial Interface Clock Input
The data on the SDI pin is sampled on the rising edge of this signal. Addition-
ally, during Read operations the Microprocessor Serial Interface updates the
SDO output on the falling edge of this signal.
NOTE: If configured in Hardware Mode, this pin functions as TxClkINV.
31
SDI
RxON
I
Serial Data Input:
Data is serially input through this pin.
The input data is sampled on the rising edge of the SClk. .
NOTES:
1.
This pin is internally pulled down
2.
If configured in Hardware Mode, this pin functions as RxON.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75L03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75L03D | 制造商:EXAR 制造商全稱:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75L03DES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3 CH T3/E3/STS1 LIU+DESYNCH3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L03DIV | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75L03DIV-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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