參數(shù)資料
型號: XRT75L00DIV-F
廠商: Exar Corporation
文件頁數(shù): 39/92頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 SGL 52TQFP
標(biāo)準(zhǔn)包裝: 96
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1,SONET
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 52-LQFP
供應(yīng)商設(shè)備封裝: 52-TQFP(10x10)
包裝: 托盤
XRT75L00D
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.2
39
0x03
Read
Only
D0
DMO
This bit is set to “1” every time the MTIP/MRing input
pins have not detected any bipolar pulses for 128
consecutive bit periods.
0
D1
RLOS
This bit is set to “1” every time the receiver declares
an LOS condition.
0
D2
RLOL
This bit is set to “1” every time when the receiver
declares a Loss of Lock condition.
0
D3
FL
This bit is set to “1” every time the FIFO in the Jitter
Attenuator is within 2 bit of underflow/overflow condi-
tion.
0
D4
ALOS
This bit is set to “1” every time the receiver declares
Analog LOS condition.
0
D5
DLOS
This bit is set to “1” every time the receiver declares
Digital LOS condition.
0
D6
PRBSLS
This bit is set to “1” every time the PRBS detects a bit
error.
0
0x04
R/W
D0
TxLEV
Writing a “1” to this bit disables the Transmit Build-out
circuit and writing a “0” enables the Transmit Build-out
circuit.
NOTE: See section 4.03 for detailed description.
0
D1
TxClkINV
Writing a “1” to this bit configures the transmitter to
sample the data on TPData/TNData input pins on the
rising edge of TxClk.
0
D2
TAOS
Setting this bit to “1” causes a continuous stream of
marks to be sent out at the TTIP and TRing pins.
0
D3
Reserved
This Bit Location is Not Used.
D4
INSPRBS
Writing a “1” to this bit causes the PRBS generator to
insert a single-bit error onto the transmit PRBS data
stream.
NOTE: PRBS Generator/Detector must be enabled
for this bit to have any effect.
0
D5
TxMON
When this bit is set to “1”, the driver monitor is con-
nected to its own transmit channel and monitors the
transmit driver. When a transmit failure is detected,
the DMO output will go high.
When this bit is “0”, MTIP and MRing can be con-
nected to other transmit channel for monitoring.
0
TABLE 16: REGISTER MAP DESCRIPTION
ADDRESS
(HEX)
TYPE
BIT LOCATION
SYMBOL
DESCRIPTION
DEFAULT
VALUE(BIN)
相關(guān)PDF資料
PDF描述
XRT75L00IV-F IC LIU E3/DS3/STS-1 SGL 52TQFP
XRT75L02DIV-F IC LIU E3/DS3/STS-1 2CH 100TQFP
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XRT75L03IV-F IC LIU E3/DS3/STS-1 3CH 128LQFP
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