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參數(shù)資料
型號: XRT73L03BIV-F
廠商: Exar Corporation
文件頁數(shù): 10/61頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 3CH 120LQFP
標(biāo)準(zhǔn)包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 120-LQFP
供應(yīng)商設(shè)備封裝: 120-LQFP(14x20)
包裝: 托盤
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
16
NOTES:
1. All XRT73L03B digital inputs are designed to be
TTL 5V compliant.
2. All XRT73L03B digital outputs are also TTL 5V
compliant. However, these outputs will not drive to
5V nor will they accept external 5V pull-ups.
ELECTRICAL CHARACTERISTICS (CONTINUED) (TA = 25°C, VDD = 3.3V + 5%, UNLESS OTHERWISE SPECIFIED)
AC ELECTRICAL CHARACTERISTICS (SEE FIGURE 5)
TERMINAL SIDE TIMING PARAMETERS (SEE FIGURE 6 AND FIGURE 7) -- {(n) = 0, 1 OR 2 }
SYMBOL
PARAMETER
MIN.
TYP
.MAX.UNITS
TxClk_(n) Clock Duty Cycle (STS-1/DS3)
30
50
70
%
TxClk_(n) Clock Duty Cycle (E3)
30
50
70
%
TxClk_(n) Frequency (SONET STS-1)
51.84
MHz
TxClk_(n) Frequency (DS3)
44.736
MHz
TxClk_(n) Frequency (E3)
34.368
MHz
t
RTX
TxClk_(n) Clock Rise Time (10% to 90%)
3
5
ns
t
FTX
TxClk_(n) Clock Fall Time (90% to 10%)
3
5
ns
t
TSU
TPData_(n)/TNData_(n) to TxClk_(n) Falling Set up time
3
1.5
ns
t
THO
TPData_(n)/TNData_(n) to TxClk_(n) Falling Hold time
3
1.5
ns
t
LCVO
RxClk_(n) to rising edge of LCV_(n) output delay
2.5
ns
t
TDY
TTIP_(n)/TRing_(n) to TxClk_(n) Rising Propagation Delay time
8
ns
RxClk_(n) Clock Duty Cycle
50
%
RxClk_(n) Frequency (SONET STS-1)
51.84
MHz
RxClk_(n) Frequency (DS3)
44.736
MHz
RxClk_(n) Frequency (E3)
34.368
MHz
t
CO
RxClk_(n) to RPOS_(n)/RNEG_(n) Delay Time
0
2.5
ns
t
RRX
RxClk_(n) Clock Rise Time (10% to 90%)
1.5
ns
t
FRX
RxClk_(n) Clock Fall Time (10% to 90%)
1.5
ns
C
I
Input Capacitance
10
pF
C
L
Load Capacitance
10
pF
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