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XRT72L56
SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
PRELIMINARY
REV. P1.1.2
20
R4
TxPOS[3]
O
See Description for Pin J1
R11
VDD
****
Power Supply 3.3V + 5%
R12
VDD
****
Power Supply 3.3V + 5%
R13
GND
****
Ground
R14
GND
****
Ground
R15
VDD
****
Power Supply 3.3V + 5%
R16
VDD
****
Power Supply 3.3V + 5%
R23
WR_R/W
I
Write Data Strobe (Intel Mode):
If the microprocessor interface is operating in the Intel Mode, then this
active-low input pin functions as the WR (Write Strobe) input signal from the
μP Once this active-low signal is asserted, then the Framer will latch the
contents of the μP Data Bus, into the addressed register (or RAM location)
within the Framer IC. In the Intel Mode, data gets latched on the rising edge
of WR
R/W Input Pin (Motorola Mode):
When the Microprocessor Interface Section is operating in the Motorola
Mode, then this pin is functionally equivalent to the R/W pin. In the Motorola
Mode, a READ operation occurs if this pin is at a logic "1". Similarly, a
WRITE operation occurs if this pin is at a logic "0".
R24
ALE_AS
I
Address Latch Enable/Address Strobe:
This input is used to latch the address (present at the Microprocessor Inter-
face Address Bus, A(11:0) into the Framer Microprocessor Interface cir-
cuitry and to indicate the start of a READ/WRITE cycle. This input is active-
high in the Intel Mode (MOTO = "low") and active-low in the Motorola Mode
(MOTO = "high").
R25
NibbleLnTF
I
Nibble Interface Select Input Pin:
This input pin allows the user to configure the Transmit Payload Data Input
Interface and the Receive Payload Data Output Interface to operate in either
the "Serial-Mode" or the "Nibble/Parallel-Mode".
Setting this input pin "high" configures the Transmit and Receive Terminal
Interfaces to operate in the "Nibble/Parallel-Mode". In this mode, the “Trans-
mit Payload Data Input Interface” block will accept the “outbound” payload
data (from the Terminal Equipment) in a “nibble-parallel” manner via the
“TxNib[3:0]” input pins. Further, the “Receive Payload Data Output Inter-
face” block will output the “inbound” payload data (to the Terminal Equip-
ment) in a “nibble-parallel” manner via the “RxNib[3:0]” output pin.
Setting this input pin "low" configures the Transmit and Receive Terminal
Interfaces to operate in the "Serial" Mode. In this mode, the “Transmit Pay-
load Data Input Interface” block will accept the “outbound” payload data
(from the Terminal Equipment) in a “serial” manner via the “TxSer” input pin.
Further, the “Receive Payload Data Output Interface” block will output the
“inbound” payload data (to the Terminal Equipment) in a “serial” manner via
the “RxSer” output pin.
PIN DESCRIPTION
FOR
THE
XRT72L56
P
IN
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P
IN
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AME
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YPE
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ESCRIPTION