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參數(shù)資料
| 型號： | XRT7295ATIW |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DS3/Sonet STS-1 Integrated Line Receiver |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PDSO20 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-20 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 1072K |
| 代理商： | XRT7295ATIW |
XRT7295AT
12
Rev.1.20
AhighRLOLoutputindicatesthattheacquisitioncircuitis
working to bring the PLL into proper frequency lock.
RLOL remains high until frequency lock has occurred;
however, the minimum RLOL pulse width is 32 clock
cycles.
PHASE HITS
In response to a phase hit in the input data, the
XRT7295AT returns to error free operation in less than
2ms. During the requisition time, RLOS may temporarily
be indicated.
LOSS-OF-SIGNAL DETECTION
Figure 1
shows that analog and digital methods of
loss-of-signal(LOS)detectionarecombinedtocreatethe
RLOS alarm output. RLOS is set if either the analog or
digital detection circuitry indicates LOS has occurred.
ANALOG DETECTION
The analog LOS detector monitors the peak input signal
amplitude. RLOS makes a high-to-low transition (input
signalregained)whentheinputsignalamplitudeexceeds
the loss-ofsignalthresholddefinedin
Table 6.
TheRLOS
low-to-high transition (input signal loss) occurs at a level
typically1.0dBbelowthehigh-to-lowtransitionlevel. The
hysteresis prevents RLOS chattering.
RLOS alarm remains high for at least 32 clock cycles,
allowing for system detection of a LOS condition without
the use of an external latch.
Once set, the
To allow for varying levels of noise and crosstalk in
different applications, three loss-of-signal threshold
settings are available using the LOSTHR pin. Setting
LOSTHR = V
DD
provides the lowest loss-of-signal
threshold; LOSTHR = V
DD
/2 (can be produced using two
50 k
±
10% resistors as a voltage divider between
V
DD
D and GNDD) provides an intermediate threshold;
andLOSTHR=GNDprovidesthehighestthreshold. The
LOSTHR pin must be set to its desired value at power-up
and must not be changed during operation.
DIGITAL DETECTION
In addition to the signal amplitude monitoring of the
analog LOS detector, the digital LOS detector monitors
the recovered data 1s density. The RLOS alarm goes
high if 160
±
32 or more consecutive 0s occur in the
receive data stream. The alarm goes low when at least
ten 1s occur in a string of 32 consecutive bits.
hysteresis prevents RLOS chattering and guarantees a
minimum RLOS pulse width of 32 clock cycles. Note,
however, that RLOS chatter can still occur.
REQB=1, input signal levels above the analog RLOS
thresholdcanstillbelowenoughtoresultinahighbiterror
rate. The resultant data stream (containing) errors can
temporarily activate the digital LOS detector, and RLOS
chatter can occur. Therefore, RLOS should not be used
as a bit error rate monitor.
This
When
RLOS chatter can also occur when RLOL is activated
(high).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT7295ATIW-F | 功能描述:外圍驅(qū)動器與原件 - PCI -.5V--6.5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295ATIW-F | 制造商:Exar Corporation 功能描述:T3/E3 LIU IC |
| XRT7295ATIWTR | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295ATIWTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295CTIW | 功能描述:總線接收器 DS3/E3/SONET STS-1 Line Receiver RoHS:否 制造商:Texas Instruments 接收機數(shù)量:4 接收機信號類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
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