XRT7295/96ES
Evaluation System for
Surface Mount Products
Rev. 1.00
5
INTRODUCTION
The XR--T7295/96 Evaluation System (see
Figure 1.
) is
intended to facilitate and speed--up the evaluation of this
high performance DS3/STS--1/E3
Receiver/Transmitter. TheXR--T7295isafullyintegrated
line receiver designed for DS3 or STS--1 applications.
The XR--T7295E is designed for E3 applications.
Functions included are receive equalizer (optional),
automatic gain control (AGC), clock recovery and data
retiming, loss of signal and loss of frequency
detection.
Input sensitivity for the receiver section is
adjustable which allows input signals at the monitor level
(--20dB below the allowed DSX--3 signal levels).
Integrated Line
lock
The XR--T7296 is a fully integrated line transmitter
designed to operate at DS3, E3 or STS--1 data rates and
complement either the XR--T7295 or the XR--T7295E
receiver.
The transmitter converts unipolar data and
clock inputs into AMI encoded pulses according to AT&T
Technical
Advisory
No.
recommendations. This device provides B3ZS or HDB3
encoding and complimentary decoding and loopback
(remote and local) functions which can be externally
controlled.
Coding errors and bipolar violations are
detected and flagged at an output pin.
34
or
CCITT
G.703
ORDER INFORMATION
The evaluation board can emulate DS3, E3 or STS--1,
depending on switch setting. To order your evaluation
board, please contact your local sales office.
Two boards available:
-- One assembled for DS3/STS--1 (XR--T7295IW)
-- One assembled for E3 (XR--T7295--1EIW)
Please specify
the type of
DS3/STS-1) in the order.
transmission (E3 or
BOARD LAYOUT CONSIDERATIONS
The following considerations are provided to obtain
maximum device sensitivity and performance: Analog
ground (GNDA) must connect to the ground plane at the
pin.
Digital outputs should have series resistor to reduce
reflections.
Follow the recommended power supply
bypassing scheme as shown in the schematic.
Place line termination resistor, PLL loop filter capacitor,
and power supply bypassing components as close as
possible to the IC.
Figure 1. Evaluation Board