參數(shù)資料
型號: XRT6166CD-F
廠商: Exar Corporation
文件頁數(shù): 9/15頁
文件大?。?/td> 0K
描述: IC DGTL DATA PROCESSOR 28SOIC
標(biāo)準(zhǔn)包裝: 27
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC
包裝: 管件
其它名稱: 1016-1355-5
XR-T6166
3
Rev. 2.03
PIN CONFIGURATION
28
1
15
14
2
3
4
5
6
7
17
16
8
9
19
18
10
11
23
22
21
20
27
26
25
24
12
13
PCMOUT
RTSEL
BIR
BDR
TS2R
TS1R
CS
VSS
ALARM
S+R
S-R
BLS
RX2MHz
BLANK
RXCKOUT
VDD
TX2MHz
RXCK2MHz
PCMIN
TS1T
BIT
BDT
TX256kHz
TS2T
ALARMIN
T+R
TTSEL
T-R
28 Lead SOIC (Jedec, 0.300”)
PIN DESCRIPTION
Pin #
Symbol
Type
Description
1
ALARM
O
Octet Timing Alarm
. When active, indicates loss of received bipolar violations that are used
for octet timing. Active high.
2
S+R
I
Positive AMI Data to Receiver.
Positive data from the XR-T6164 receive-side. Active low.
3
S-R
I
Negative AMI Data to Receiver.
Negative data from the XR-T6164 receive-side. Active low.
4
BLS
I
Byte Locking Supervision.
When active, causes blanking of PCMOUT under received
alarm conditions. Active low.
5
RX2MHz
I
Receiver 2.048MHz Clock
. Used to clock out PCM data.
6
BLANK
I
PCMOUT Data Blanking
. When active, forces PCMOUT data to all ones (AIS). Active high.
7
RXCKOUT
O
128kHz Extracted Clock.
Clock recovered from received data.
8
VDD
+5V
$10% Power Source.
9
RXCK2MHz
I
2.048MHz Clock.
Used by receiver clock recovery circuit.
10
TS1T
I
Transmitter Time-slot 1 Input
.
11
BDT
O
Transmitter Byte Deletion Flag
. Active when a transmit byte is deleted. Active high.
12
TS2T
I
Transmitter Time-slot 2 Input.
13
T+R
O
Transmit Positive AMI Data Output
. Data to XR-T6164 positive transmitter input. Active low.
14
T-R
O
Transmit Negative AMI Data Output.
Data to XR-T6164 negative transmitter input. Active
low.
15
TTSEL
I
Transmit Time-slot Select.
When high, pin 10 is selected; when low, pin 12 is selected.
16
ALARMIN
I
Alarm Input.
When active, inhibits insertion of violations used for octet timing in transmitter
output. Active high.
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