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參數(shù)資料
| 型號： | XRK32510CG |
| 廠商： | EXAR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 3.3V PHASE-LOCK LOOP CLOCK DRIVER WITH 10 CLOCK OUTPUTS |
| 中文描述： | 32510 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 4.40 MM, PLASTIC, MO-150, TSSOP-24 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 73K |
| 代理商： | XRK32510CG |
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
xr
XRK32510
3.3V PHASE-LOCK LOOP CLOCK DRIVER WITH 10 CLOCK OUTPUTS
OCTOBER 2005
GENERAL DESCRIPTION
REV. 1.0.1
The XRK32510 is a high performance, low jitter, low
skew clock driver. The XRK32510 uses phase-lock
loop (PLL) tecnology to synthesize the CLK_IN signal
into 10 output signals (QA), synchronized in both
phase and frequency. XRK32510 features low skew,
low jitter and 50% duty cycle making it a perfect fit in
dual in line memory module (DIMM) board clocking,
PC133
SDRAM
designs
applications.
The 10 outputs can be disabled using the Output
Enable (OE) pin.
By connecting the Feedback Output (FB_OUT) signal
to the Feedback Input (FB_IN) signal, the
propagation delay from CLK_IN to the 10 buffered
Outputs is nearly zero.
and
other
server
FEATURES
Spread Spectrum Clock Compatible
Operating frequency range: 25MHz to 175MHz
Low noise
Low jitter internal PLL
No external RC filter components required
Meets or exceeds DPC133 registered DIMM
specification 1.1
Output Enable (OE) pin can be used to disable the
CLCK_OUT pins
Operating supply of 3.3V VDD
Plastic 24 Pin TSSOP package
PRODUCT ORDERING INFORMATION
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRK32510
Ref
PLL
CLK_IN
FB_IN
OE
QA7
QA8
QA9
FB_OUT
QA0
QA1
QA2
QA3
QA4
QA5
QA6
0
1
AVDD
P
RODUCT
N
UMBER
P
ACKAGE
T
YPE
O
PERATING
T
EMPERATURE
R
ANGE
XRK32510CG
24 Pin TSSOP
0°C to +70°C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRK39351 | 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351_0611 | 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351CQ | 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351IQ | 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39653_0611 | 3.3V, 8-OUTPUT ZERO DELAY BUFFER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRK39351 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351_0611 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351CQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39351IQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER |
| XRK39653 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V, 8-OUTPUT ZERO DELAY BUFFER |
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