參數(shù)資料
型號(hào)： XR82C684CJ/44-F
廠商： Exar Corporation
文件頁數(shù)： 77/107頁
文件大?。?/td> 0K
描述： IC UART CMOS QUAD 44PLCC
標(biāo)準(zhǔn)包裝： 27
特點(diǎn)： *
通道數(shù)： 4，QUART
FIFO's： 3 字節(jié)
電源電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 管件
其它名稱： 1016-1325-5
XR82C684
B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
! $+
! $+0
$+
$+0
L :
L H%
L :
L H%
L :
L H%
L :
L H%
L < 3
L ;(,
L < 3
L ;(,
L < 3
L ;(,
L < 3
L ;(,
Table 19. Input Port Configuration Register 2 - IPCR2
$ /$ + , * 1 (# % * 3(,
E( ( 3 ( * - ( * % * %
% 3 Please note that the applicable bits, within each of the ACR registers, are shaded.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
)2
'
-( D '
! $+4
$
! $+
$
! $+
$
! $+
$
L
Table 4
L
L :
L
L :
L
L :
L
L :
Table 20. ACR1- Auxiliary Control Register 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
)2
'
-( D '
! $+
$
! $+
$
! $+
$
! $+0
$
L
Table 4
L
L :
L
L :
L
L :
L
L :
Table 21. ACR2 - Auxiliary Control Register 2
(, $PBQ - $PBQ
Note:
This “two-tiered” interrupt enabling/disabling
approach, for the “Input Change of State” interrupt allows
tremendous flexibility for the user. Setting or clearing the
bits in ACR1[3:0] and/or ACR2[3:0] allows the user to
specify exactly which Input Port pins to be enabled (or
disabled) for generating the “Input Port Change of State”
interrupt.
Setting or clearing IMR1[7] and/or IMR2[7]
allows the user to “globally” enable or disable this
interrupt.
( * 3 $+% 3( ((' 3(' *
(, ( (% "(' /, * 1
3 ( * ' $+ ' (% % %
* % ( (% * # 3 (, *
$+%# ( % % /, * 1 (#
+