XR68C681
@
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Input Port
Change
Delta Break
B
RXRDY/
FFULLB
TXRDYB
Counter
Ready
Delta Break
A
RXRDY/
FFULLA
TXRDYA
J8
JE%
J8
JE%
J8
JE%
J8
JE%
J8
JE%
J8
JE%
J8
JE%
J8
JE%
Table 5. Interrupt Status Register - (ISR) Bit Format
(- ($ ' + % (% (% $+($
ISR[7]: Input Port Change of State:
#+ (% ( (% -(' HI" H'- + %I %
$'$ #, #,1 (% % $ %(' (%
( & $(- #, (+ #M@N J #M@N (%
'$ , % $ #, *& $(-
#," % ( $(4
($(($ # , ( '-$ %
+( % + ($ ( %" +(-
- +
$($ $%'(( + #," % %
Section E
,% ( $ (% ( '$(("
% % $ (-%4
A( ( $ ( +