REV. 1.0.3 SINGLE CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER PIN DESCRIPTIONS Pin Descriptions N
參數(shù)資料
型號： XR19L400IL40-F
廠商： Exar Corporation
文件頁數(shù)： 23/46頁
文件大小： 0K
描述： IC UART/TXRX RS485 40QFN
標(biāo)準(zhǔn)包裝： 490
特點： *
通道數(shù)： 1，UART
FIFO's： 64 字節(jié)
規(guī)程： RS485
電源電壓： 3.3V，5V
帶自動流量控制功能： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 40-QFN 裸露焊盤（6x6）
包裝： 托盤
XR19L400
3
REV. 1.0.3
SINGLE CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
PIN DESCRIPTIONS
Pin Descriptions
NAME
40-QFN
PIN#
TYPE
DESCRIPTION
DATA BUS INTERFACE (CMOS/TTL Voltage Levels)
A2
A1
A0
38
39
40
I
Address bus lines [2:0]. These 3 address lines select one of the internal registers in the
UART during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
8
7
6
5
4
3
2
1
I/O Data bus lines [7:0] (bidirectional).
IOR#
(NC)
15
I
When I/M# pin is HIGH, the Intel bus interface is selected and this input becomes read
strobe (active LOW). The falling edge instigates an internal read cycle and retrieves the
data byte from an internal register pointed by the address lines [A2:A0], puts the data byte
on the data bus to allow the host processor to read it on the rising edge.
When I/M# pin is LOW, the Motorola bus interface is selected and this input is not used.
IOW#
(R/W#)
14
I
When I/M# pin is HIGH, it selects Intel bus interface and this input becomes write strobe
(active LOW). The falling edge instigates the internal write cycle and the rising edge trans-
fers the data byte on the data bus to an internal register pointed by the address lines.
When I/M# pin is LOW, the Motorola bus interface is selected and this input becomes read
(HIGH) and write (LOW) signal.
CS#
(CS#)
9
I
This input is the chip select (active low) for the UART in both the Intel and Motorola bus
modes.
INT
(IRQ#)
37
O
(OD)
When I/M# pin is HIGH, it selects Intel bus interface and this output become the active
HIGH interrupt output. This output is enabled through the software setting of MCR[3]. This
output is set to the active mode when MCR[3] is set to a logic 1, and set to the three state
mode when MCR[3] is set to a logic 0. See MCR[3].
When I/M# pin is LOW, it selects Motorola bus interface and this output becomes the active
LOW, open-drain interrupt output for both channels. An external pull-up resistor is required
for proper operation. MCR[3] must be set to a logic 0 for proper operation of the interrupt.
SERIAL I/O INTERFACE (RS-485/RS-485 Voltage Levels)
TX+
TX-
32
30
O
Differential UART Transmit Data.
RX+
RX-
28
27
I
Differential UART Receive Data.
ANCILLARY SIGNALS (CMOS/TTL Voltage Levels)
HALF/
FULL#
34
I
Half-duplex or full-duplex mode select. This pin is sampled upon power-up.
When HALF/FULL# is HIGH, half-duplex mode is enabled.
When HALF/FULL# is LOW, full-duplex mode is enabled.
After power-up, FCTR bit-3 can select between the half-duplex or full-duplex modes.
XTAL1
12
I
Crystal or external clock input.
相關(guān)PDF資料
PDF描述
XR19L402IL48-F IC UART/TXRX RS485 48QFN
XR20M1170IL24TR-F IC UART FIFO I2C/SPI 64B 24QFN
XR20M1172IG28-F IC UART FIFO I2C/SPI 64B 28TSSOP
XR20M1280IL40-F IC UART I2C/SPI 128 BYTE 40QFN
XR20V2170IL40-F IC UART/TXRX I2C/SPI RS232 40QFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR19L400IL40TR-F 功能描述:UART 接口集成電路 Transceiver 1 Tx/1 Rx RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR19L402 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
XR19L402_09 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
XR19L402IL48 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
XR19L402IL48-0B-EB 功能描述:界面開發(fā)工具 Supports L402 48 pin QFN, PCI Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*