REV. 1.0.3 1.4.8 Multi-Purpose Inputs and Outputs The V352 provides 16 multi-purpose inputs/" />
參數(shù)資料
型號： XR17V352IB113-F
廠商： Exar Corporation
文件頁數(shù)： 17/64頁
文件大小： 0K
描述： IC UART PCIE 256B DUAL 113FPBGA
產(chǎn)品培訓(xùn)模塊： PCIe UARTs
標(biāo)準(zhǔn)包裝： 260
特點： *
通道數(shù)： 2，DUART
FIFO's： 256 字節(jié)
規(guī)程： RS485
電源電壓： 3.3V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 113-LFBGA
供應(yīng)商設(shè)備封裝： 113-FPBGA
包裝： 托盤
其它名稱： 1016-1471
XR17V352IB113-F-ND
XR17V352
24
HIGH PERFORMANCE DUAL PCI EXPRESS UART
REV. 1.0.3
1.4.8
Multi-Purpose Inputs and Outputs
The V352 provides 16 multi-purpose inputs/outputs MPIO[15:0] for general use. Each pin can be programmed
to be an input or output function. The input logic state can be set for normal or inverted level, and optionally set
to generate an interrupt. The outputs can be set to be normal HIGH or LOW state, 3-state, or open drain. Their
functions and definitions are programmed through 6 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV,
MPIOSEL, and MPIOOD. If all 16 pins are set for inputs, all 16 interrupts would be ORed together. The ORed
interrupt is reported in the channel 0 UART interrupt status, see Interrupt Status Register. The pins may also be
programmed to be outputs and to the 3-state condition for signal sharing. The MPIO[0] pin can be programmed
to show the Timer output. When it is programmed to be the Timer output, all the above 5 registers lose control
over the MPIO[0] pin. For details on Timer output, please see “Section 1.4.2, General Purpose 16-bit Timer/
1.4.9
MPIO REGISTERS
REGB[18](Read/Write
Logic 0 (default) - Global interrupt enable. Interrupts to PCI host are enabled.
Logic 1 - Global interrupt disable. Interrupts to PCI host are disabled.
REGB[19](Read-Only)
Logic 0 - EEPROM load is valid.
Logic 1 - EEPROM load error caused by one of the following conditions: EEPROM not
attached, final bit not found, parity error detected.
REGB[20] (Write-Only)
Control the EECK, clock, output on the EEPROM interface.
REGB[21] (Write-Only)
Control the EECS, chips select, output to the EEPROM device.
REGB[22] (Write-Only)
EEDI data input. Write data to the EEPROM device.
REGB[23] (Read-Only)
EEDO data output. Read data from the EEPROM device.
1.4.7
REGB Register
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