參數(shù)資料
型號(hào): XR17D154IV
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
中文描述: 4 CHANNEL(S), 6.25M bps, SERIAL COMM CONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, TQFP-144
文件頁數(shù): 8/69頁
文件大?。?/td> 1459K
代理商: XR17D154IV
XR17D154
xr
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
REV. 1.2.2
16
Registers INT3, INT2 and INT1 [32:8]
Twenty four bit encoded interrupt indicator. Each channel’s interrupt is encoded into 3 bits for receive, transmit,
and status. Bit [10:8] represent channel 0 and go up to channel 3 with bits [19:17]. The 3 bit encoding and their
priority order are shown below in Table 6. The Timer and MPIO interrupts are for the device and therefore they
exist within channel 0 space (bits [10:8]) only.
.
FIGURE 6. THE GLOBAL INTERRUPT REGISTER, INT0, INT1, INT2 AND INT3
TABLE 6: UART CHANNEL [3:0] INTERRUPT SOURCE ENCODING
PRIORITY
BIT[N+2]
BIT[N+1]
BIT[N]
INTERRUPT SOURCE(S)
x
0
None
1
0
1
RXRDY and RX Line Status (logic OR of LSR[4:1])
2
0
1
0
RXRDY Time-out
3
0
1
TXRDY, THR or TSR (auto RS485 mode) empty
4
1
0
MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon det. or special char. detected
5
1
0
1
Reserved.
6
1
0
MPIO pin(s). Available only within channel 0, reserved in other channels.
7
1
TIMER Time-out. Available only within channel 0, reserved in other channels.
Channel-3
Channel-2
Channel-1
Channel-0
INT2 Register
INT1 Register
INT3 Register
INT0 Register
Interrupt Registers,
INT0, INT1, INT2 and INT3
Bit-0
Bit-1
Bit-2
Bit-3
Bit-7
Bit-4
Bit-5
Bit-6
Ch-3 Ch-2 Ch-1 Ch-0
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Bit
N+1
Bit
N+2
Bit
N
Rsvd Rsvd Rsvd Rsvd
Rsvd
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