REV. 1.4.3 5V PCI BUS OCTAL UART 17 1.2.2 General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL" />
參數(shù)資料
型號(hào): XR17C158IV
廠商: Exar Corporation
文件頁(yè)數(shù): 9/67頁(yè)
文件大?。?/td> 0K
描述: IC UART PCI BUS OCTAL 144LQFP
產(chǎn)品變化通告: Leaded UART, V&I Obsolescence 11/Apr/2011
標(biāo)準(zhǔn)包裝: 60
特點(diǎn): *
通道數(shù): 8
FIFO's: 64 字節(jié)
規(guī)程: RS485
電源電壓: 4.5 V ~ 5.5 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
xr
XR17C158
REV. 1.4.3
5V PCI BUS OCTAL UART
17
1.2.2
General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT
0XXX-XX-00-00)
A 16-bit down-count timer for general purpose timer or counter. Its clock source may be selected from internal
crystal oscillator or externally on pin TMRCK. The timer can be set to be a single-shot for a one-time event or
re-triggerable for continue interval. An interrupt may be generated in the Interrupt Register bits [10:8] when the
timer times out. It is controlled through 4 configuration registers [TIMERCNTL, TIMER, TIMELSB,
TIMERMSB]. These registers provide start/stop and re-triggerable or one-shot operation. The time-out output
of the Timer can be set to generate an interrupt for system or event alarm.
TIMER [15:8] Reserved
FIGURE 5. TIMER/COUNTER CIRCUIT
TABLE 7: TIMER CONTROL REGISTERS
TIMERCNTL [0]
Logic 0 (default) disables Timer-Counter interrupt and logic 1 enables the interrupt, reading the TIM-
ERCNTL register clears the interrupt.
TIMERCNLT [1]
Logic 0 (default) stops/pauses the timer and logic 1 starts/re-starts the timer/counter.
TIMERCNTL [2]
Logic 0 (default) selects re-triggerable timer function and logic 1 selects one-shot (timer function).
TIMERCNTL [3]
Logic 0 (default) selects internal and logic one selects external clock to the timer/counter.
TIMERCNTL [4]
Routes the Timer-Counter interrupt to MPIO[0] if MPIOSEL[0]=0 for external event control.
TIMERCNTL [7:5] Reserved (defaults to zero)
TMRCK
OSC. CLOCK
TIMERCNTL [3]
16-Bit
Timer/Counter
TIMERCNTL [2]
Re-trigger
Single-shot
TIMERCNTL [1]
Start/Stop
TIMERCNTL [0]
Timer Interrupt, Ch-0 INT=7
Time-out
Timer Interrupt Enable
Single/Re-triggerable
TIMERMSB and TIMERLSB
(16-bit Value)
0
1
0
1
0
1
No Interrupt
Clock
Select
TIMERCNTL [4]
0
1
MPIO[0]
MPIOLVL[0]
TIMERCNTL Register
Rsvd
MPIO[0]
Control
Clock
Select
Single/
Re-trigger
Start/
Stop
INT
Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2
Bit-1 Bit-0
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