參數(shù)資料
型號(hào)： XR17C152CM-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 9/62頁(yè)
文件大小： 0K
描述： IC UART PCI BUS DUAL 100TQFP
標(biāo)準(zhǔn)包裝： 90
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
規(guī)程： RS485
電源電壓： 5V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤
á
XR17C152
REV. 1.2.0
5V PCI BUS DUAL UART
17
REGB [23:16] (default 0x00)
REGB register provides a control for simultaneous write to both UARTs configuration register or individually.
This is very useful for device initialization in the power up and reset routines. Also, the register provides a
facility to interface to the non-volatile memory device such as a 93C46 EEPROM. In embedded applications,
the user can use this facility to store proprietary data.
1.2.9
Multi-Purpose Inputs and Outputs
The 152 provides 8 multi-purpose inputs/outputs [MPIO7:0] for general use. Each pin can be programmed to
be an input or output function. The input logic state can be set for normal or inverted level, and optionally set to
generate an interrupt. The outputs can be set to be normal HIGH or LOW state, or three-state. Their functions
and definitions are programmed through 5 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV and MPIOSEL. If
all 8 pins are set for inputs, all 8 interrupts would be or’ed together. The Or’ed interrupt is reported in the
channel 0 UART interrupt status, see Interrupt Status Register. The pins may also be programmed to be
outputs and to the three-state condition for signal sharing.
1.2.10
MPIO REGISTER
Bit 7 represents MPIO7 pin and bit 0 represents MPIO0 pin. There are 5 registers that select, control and
monitor the 8 multipurpose inputs and output pins. Figure 6 shows the internal circuitry.
1.2.8
REGB Register
REGB[16] (Read/Write)
Logic 0 (default) write to each UART configuration registers individually.
Logic 1 enables simultaneous write to both UARTs configuration register.
REGB[19:17]
Reserved.
REGB[20] (Write-Only)
Control the EECK, clock, output (pin 84) on the EEPROM interface.
REGB[21] (Write-Only)
Control the EECS, chips select, output (pin 83) to the EEPROM device.
REGB[22] (Write-Only)
EEDI (pin 82) data input. Write data to the EEPROM device.
REGB[23] (Read-Only)
EEDO (pin 81) data output. Read data from the EEPROM device.
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