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參數(shù)資料
| 型號： | XR16M781IL32-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 31/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 64B 32QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 1，UART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS232，RS422，RS485 |
| 電源電壓： | 1.62 V ~ 3.63 V |
| 帶自動(dòng)流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 托盤 |
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XR16M781
37
REV. 1.0.1
1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE
EMSR[5:4]: Extended RTS Hysteresis
TABLE 13: AUTO RTS HYSTERESIS
BIT-5
BIT-4
BIT-1
BIT-0
HYSTERESIS
(CHARACTERS)
0
1
0
1
0
1
0
±4
±6
±8
0
1
0
1
0
1
0
1
±8
±16
±24
±32
1
0
1
0
1
0
1
±40
±44
±48
±52
1
0
1
0
1
0
1
±12
±20
±28
±36
EMSR[6]: LSR Interrupt Mode
Logic 0 = LSR Interrupt Delayed (default). LSR bits 2, 3, and 4 will generate an interrupt when the character
with the error is in the RHR.
Logic 1 = LSR Interrupt Immediate. LSR bits 2, 3, and 4 will generate an interrupt as soon as the character is
received into the FIFO.
EMSR[7]: Xoff/Special character Interrupt Mode Select
This bit selects how the Xoff and Special character interrupt is cleared. The XON interrupt can only be cleared
by reading the ISR register.
Logic 0 = Xoff interrupt is cleared by either reading ISR register or when an XON character is received.
Special character interrupt is cleared by either reading ISR register or when next character is received.
(default).
Logic 1 = Xoff/Special character interrupt can only be cleared by reading the ISR register.
4.13
Baud Rate Generator Registers (DLL, DLM and DLD) - Read/Write
These registers make-up the value of the baud rate divisor. The M781 has different DLL, DLM and DLD for
transmitter and receiver. It provides more convenience for the transmitter and receiver to transmit data with
different rate. The M781 uses DLD[7:6] to select TX or RX. Then it provides DLD[5:0] to select the sampling
frequency and fractional baud rate divisor. The concatenation of the contents of DLM and DLL gives the 16-bit
divisor value. The value is added to DLD[3:0]/16 to achieve the fractional baud rate divisor. DLD must be
enabled via EFR bit-4 before it can be accessed. See Table 14 below and See ”Section 2.7, Programmable
EMSR
FCTR
RTS#
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| XR16M890IL32-0C-EB | 功能描述:UART 接口集成電路 EVAL F/M890 32QFN MOT, INTEL, VLIO INT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16M890IL32-F | 功能描述:UART 接口集成電路 1-Ch 8 Bit/VLIO UART w/Lvl Shftrs & 4GPIO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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