- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄300162 > XR16M770IL24 (EXAR CORP) 1 CHANNEL(S), 16M bps, SERIAL COMM CONTROLLER, QCC24 PDF資料下載
參數(shù)資料
| 型號： | XR16M770IL24 |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 16M bps, SERIAL COMM CONTROLLER, QCC24 |
| 封裝： | 4 X 4 MM, 0.90 MM HEIGHT, QFN-24 |
| 文件頁數(shù)： | 5/52頁 |
| 文件大小： | 1091K |
| 代理商： | XR16M770IL24 |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
XR16M770
13
REV. 1.0.2
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
2.8
Transmitter
The transmitter section comprises of an 8-bit Transmit Shift Register (TSR) and 64 bytes of FIFO which
includes a byte-wide Transmit Holding Register (THR). TSR shifts out every data bit with the 16X/8X/4X
internal clock. A bit time is 16/8/4 clock periods. The transmitter sends the start-bit followed by the number of
data bits, inserts the proper parity-bit if enabled, and adds the stop-bit(s). The status of the FIFO and TSR are
reported in the Line Status Register (LSR bit-5 and bit-6).
2.8.1
Transmit Holding Register (THR) - Write Only
The transmit holding register is an 8-bit register providing a data interface to the host processor. The host
writes transmit data byte to the THR to be converted into a serial data stream including start-bit, data bits,
parity-bit and stop-bit(s). The least-significant-bit (Bit-0) becomes first data bit to go out. The THR is the input
register to the transmit FIFO of 64 bytes when FIFO operation is enabled by FCR bit-0. Every time a write
operation is made to the THR, the FIFO data pointer is automatically bumped to the next sequential data
location.
2.8.2
Transmitter Operation in non-FIFO Mode
The host loads transmit data to THR one character at a time. The THR empty flag (LSR bit-5) is set when the
data byte is transferred to TSR. THR flag can generate a transmit empty interrupt (ISR bit-1) when it is enabled
by IER bit-1. The TSR flag (LSR bit-6) is set when TSR becomes completely empty.
FIGURE 8. TRANSMITTER OPERATION IN NON-FIFO MODE
Transmit
Holding
Register
(THR)
Transmit Shift Register (TSR)
Data
Byte
L
S
B
M
S
B
THR Interrupt (ISR bit-1)
Enabled by IER bit-1
TXNOFIFO1
16X or 8X or 4X
Clock
( DLD[5:4] )
相關PDF資料 |
PDF描述 |
|---|---|
| XR16M780IM48 | SERIAL COMM CONTROLLER, PQFP48 |
| XR68C681CJ | XR-68C681CJ PLCC 44 UART 2 CHANELS |
| XS170 | Multifunction Telecom Switch |
| XS170S | Multifunction Telecom Switch |
| XS170STR | Multifunction Telecom Switch |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR16M770IL24-0B-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16M770IL24 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16M770IL24-0C-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16M770IL24 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16M770IL24-F | 功能描述:UART 接口集成電路 1.8 HIGH PERFORMANCE UART W/64 RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16M770IL32 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO |
| XR16M770IL32-0A-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16M770IL32 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復。