REV. 1.0.1 2.18 Internal Loopback The M681 UART provides an " />
參數(shù)資料
型號： XR16M681IL32-0C-EB
廠商： Exar Corporation
文件頁數(shù)： 15/51頁
文件大小： 0K
描述： EVAL BOARD FOR XR16M681-C 32QFN
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16M681
22
1.62V TO 3.63V UART WITH 32-BYTE FIFO AND VLIO INTERFACE
REV. 1.0.1
2.18
Internal Loopback
The M681 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 14 shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held HIGH or mark condition while RTS# and DTR# are de-asserted, and CTS#,
DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held HIGH during loopback test else
upon exiting the loopback test the UART may detect and report a false “break” signal.
FIGURE 14. INTERNAL LOOPBACK
TX
RX
M
ode
m
/
G
ene
ra
lP
u
rpose
Control
L
ogi
c
Inte
rnal
D
a
ta
Bus
Line
sand
Control
S
ignals
RT S #
M C R bit-4=1
VC C
T ra n sm it S h ift R e g is te r
(TH R /FIFO )
R ec e iv e S h ift R e gis ter
(RHR/F IF O )
CT S #
DT R#
DS R#
RI#
CD#
OP 1 #
RT S #
CT S #
DT R#
DS R#
RI#
CD #
VC C
OP 2 #
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