FIGURE 2. PIN OUT ASSIGNMENT
24-pin QFN
123
456
11
12
7
10
8
9
18 17 16 15 14 13
20
19
24
21
23
22
AD2
AD1
AD0
VCC
AD3
AD4
AD
7
RX
TX
CS
#
AD
6
AD
5
RT
S#
IN
T
LL
A#
NC
RE
SET#
CT
S#
XTAL2
IOW#
GND
IOR#
XTAL1
PWRSAVE
1 23 4 5 6 78
24 23 22 21 20 19 18 17
32
31
30
29
28
27
26
25
11
12
13
14
15
16
9
10
RI#
AD3
AD2
AD1
AD0
VCC
DSR#
CD#
AD
6
AD
7
RX
TX
CS
AD
4
AD
5
NC
32-pin QFN
XTAL1
XTAL2
IOW#
GND
IOR#
PWRSAVE
NC
RESE
T
#
RT
S#
IN
T
DT
R
#
LL
A
#
NC
CT
S#
1 2 3 4 5
A
B
C
D
E
Transparent Top View
A1 Corner
CTS#
RESET#
RTS#
LLA#
IOR#
VCC
AD5
DTR#
INT
GND
AD0
AD7
RX
DSR#
XTAL2
AD3
AD1
CS#
PWRSAVE
XTAL1
AD4
AD2
AD6
TX
IOW#
ORDERING INFORMATION
PART NUMBER
PACKAGE
OPERATING TEMPERATURE
RANGE
DEVICE STATUS
XR16M681IL24
24-Pin QFN
-40°C to +85°C
Active
XR16M681IL32
32-Pin QFN
-40°C to +85°C
Active
XR16M681IB25
25-Pin BGA
-40°C to +85°C
Active
XR16M681
2
1.62V TO 3.63V UART WITH 32-BYTE FIFO AND VLIO INTERFACE
REV. 1.0.1