參數(shù)資料
型號: XR16M680IB25-F
廠商: Exar Corporation
文件頁數(shù): 1/57頁
文件大?。?/td> 0K
描述: IC UART FIFO 32B 25BGA
標(biāo)準(zhǔn)包裝: 714
特點: *
通道數(shù): 1,UART
FIFO's: 32 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 1.62 V ~ 3.63 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 25-WFBGA
供應(yīng)商設(shè)備封裝: 25-BGA(3x3)
包裝: 托盤
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16M680
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO
SEPTEMBER 2008
REV. 1.0.0
GENERAL DESCRIPTION
The XR16M6801 (M680) is an enhanced Universal
Asynchronous Receiver and Transmitter (UART) with
32 bytes of transmit and receive FIFOs, selectable
transmit and receive FIFO trigger levels, automatic
hardware and software flow control, and data rates of
up to 16 Mbps at 3.3V, 12.5 Mbps at 2.5V and 7.5
Mbps at 1.8V with 4X data sampling rate.
The Auto RS-485 Half-Duplex Direction control
feature simplifies both the hardware and software for
half-duplex RS-485 applications. In addition, the
Multidrop
mode
with
Auto
Address
detection
increases
the
performance
by
simplifying
the
software routines.
The Independent TX/RX Baud Rate Generator
feature allows the transmitter and receiver to operate
at different baud rates.
Power consumption of the
M680 can be minimized by enabling the sleep mode
and PowerSave mode.
The M680 has a 16550 compatible register set that
provide users with operating status and control,
receiver error indications, and modem serial interface
controls. An internal loopback capability allows
onboard diagnostics. The M680 is available in 32-pin
QFN, 48-pin TQFP and 25-pin BGA packages. All
three packages offer both the 16 mode (Intel bus)
interface and the 68 mode (Motorola bus) interface
which
allows
easy
integration
with
Motorola
processors.
NOTE: 1 Covered by U.S. Patent #5,649,122.
FEATURES
Pin-to-pin compatible with XR16L580 in 32-QFN
and 48-TQFP packages
Intel or Motorola Bus Interface select
16Mbps maximum data rate
Selectable TX/RX trigger levels
TX/RX FIFO Level Counters
Independent TX/RX Baud Rate Generator
Fractional Baud Rate Generator
Auto RTS/CTS Hardware Flow Control
Auto XON/XOFF Software Flow Control
Auto RS-485 Half-Duplex Direction Control
Multidrop mode w/ Auto Address Detect
Sleep Mode with Automatic Wake-up
PowerSave mode
Infrared (IrDA 1.0 and 1.1) mode
1.62V to 3.63V supply operation
Crystal oscillator or external clock input
APPLICATIONS
Personal Digital Assistants (PDA)
Cellular Phones/Data Devices
Battery-Operated Devices
Global Positioning System (GPS)
Bluetooth
FIGURE 1. XR16M680 BLOCK DIAGRAM
VC C
XTAL1
XTAL2
C rystal O sc/Buffer
TX, R X,
RTS#, CTS#,
DTR#, D SR#,
Intel or
Motorola
Data Bus
Interface
UART
32 Byte RX FIFO
BR G
IR
EN DEC
TX &
RX
UART
R egs
A2:A0
Pw rSave
32 Byte TX FIFO
RI#, CD #
R ESET
(R ESET#)
D7:D 0
IO W # (R/W #)
CS#
INT (IRQ #)
IO R #
GND
(1.62 to 3.63 V)
16/68#
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