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參數(shù)資料
| 型號： | XR16M654IQ100-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 35/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR16M654-B 100QFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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XR16M654/654D
40
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
REV. 1.0.0
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and
RTS de-asserts HIGH at the next upper trigger level/hysteresis level. RTS# will return LOW when FIFO data
falls below the next lower trigger level/hysteresis level. The RTS# output must be asserted (LOW) before the
auto RTS can take effect. RTS# pin will function as a general purpose output when hardware flow control is
disabled.
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts to logic
1. Data transmission resumes when CTS# returns to a logic 0.
4.13
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see Table 8.
4.14
FIFO Status Register (FSTAT) - Read/Write
This register is applicable only to the 100 pin QFP XR16M654. The FIFO Status Register provides a status
indication for each of the transmit and receive FIFO. These status bits contain the inverted logic states of the
TXRDY# A-D outputs and the (un-inverted) logic states of the RXRDY# A-D outputs. The contents of the
FSTAT register are placed on the data bus when the FSRS# pin (pin 76) is a logic 0. Also see FSRS# pin
description.
FSTAT[3:0]: TXRDY# A-D Status Bits
Please see Table 5 for the interpretation of the TXRDY# signals.
FSTAT[7:4]: RXRDY# A-D Status Bits
Please see Table 5 for the interpretation of the RXRDY# signals.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16M654IQ100-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16M654IQ100TR-F | 制造商:Exar Corporation 功能描述:UART 4-CH 64Byte FIFO 1.8V/2.5V/3.3V 100-Pin QFP T/R |
| XR16M654IV-0A-EVB | 功能描述:界面開發(fā)工具 Eval Board for XR16M654IV-0A RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16M654IV-0B-EVB | 功能描述:界面開發(fā)工具 Eval Board for XR16M654IV-0B RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16M654IV64 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO |
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