TRSI Delay To Reset Interrupt Fr" />
參數(shù)資料
型號: XR16M564IJ-0B-EVB
廠商: Exar Corporation
文件頁數(shù): 37/55頁
文件大小: 0K
描述: EVAL BOARD FOR XR16M654-B 68PLCC
標準包裝: 1
系列: *
XR16M564/564D
42
1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO
REV. 1.0.0
TRSI
Delay To Reset Interrupt From IOR#
50
ns
TSSI
Delay From Stop To Set Interrupt
1
Bclk
TRRI
Delay From IOR# To Reset Interrupt
45
ns
TSI
Delay From Start To Interrupt
45
ns
TINT
Delay From Initial INT Reset To
Transmit Start
8
24
8
24
8
24
Bclk
TWRI
Delay From IOW# To Reset Interrupt
45
ns
TSSR
Delay From Stop To Set RXRDY#
1
Bclk
TRR
Delay From IOR# To Reset RXRDY#
45
ns
TWT
Delay From IOW# To Set TXRDY#
45
ns
TSRT
Delay From Center of Start To Reset
TXRDY#
8
Bclk
TRST
Reset Pulse Width
40
ns
Bclk
Baud Clock
16X or 8X or 4X of data rate
Hz
FIGURE 14. CLOCK TIMING
AC ELECTRICAL CHARACTERISTICS
TA = -40
O TO +85OC, VCC IS 1.62 TO 3.63V, 70 PF LOAD WHERE APPLICABLE
SYMBOL
PARAMETER
LIMITS
1.8V ± 10%
MIN
MAX
LIMITS
2.5V ± 10%
MIN
MAX
LIMITS
3.3V ± 10%
MIN
MAX
UNIT
OSC
CLK
EXTERNAL
CLOCK
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