- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16507 > XR16M554IV-0B-EVB (Exar Corporation)EVAL BOARD FOR XR16M554-B 64LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | XR16M554IV-0B-EVB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 15/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR16M554-B 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
XR16M554/554D
22
1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO
REV. 1.0.0
4.4
Interrupt Status Register (ISR)
The UART provides multiple levels of prioritized interrupts to minimize external software interaction. The
Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the
ISR will give the user the current highest pending interrupt level to be serviced, others are queued up to be
serviced next. No other interrupts are acknowledged until the pending interrupt is serviced. The Interrupt
Source Table, Table 9, shows the data values (bit 0-3) for the interrupt priority levels and the interrupt sources
associated with each of these interrupt levels.
4.4.1
Interrupt Generation:
LSR is by any of the LSR bits 1, 2, 3 and 4.
RXRDY Data Ready is by RX trigger level.
RXRDY Data Time-out is by a 4-char plus 12 bits delay timer.
TXRDY is by TX FIFO empty.
MSR is by any of the MSR bits 0, 1, 2 and 3.
4.4.2
Interrupt Clearing:
LSR interrupt is cleared by a read to the LSR register.
RXRDY interrupt is cleared by reading data until FIFO falls below the trigger level.
RXRDY Time-out interrupt is cleared by reading RHR.
TXRDY interrupt is cleared by a read to the ISR register or writing to THR.
MSR interrupt is cleared by a read to the MSR register.
]
ISR[0]: Interrupt Status
Logic 0 = An interrupt is pending and the ISR contents may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending (default condition).
ISR[3:1]: Interrupt Status
These bits indicate the source for a pending interrupt at interrupt priority levels (See Interrupt Source Table 9).
ISR[4]: Reserved (Default 0)
ISR[5]: Reserved (Default 0)
TABLE 9: INTERRUPT SOURCE AND PRIORITY LEVEL
PRIORITY
ISR REGISTER STATUS BITS
SOURCE OF INTERRUPT
LEVEL
BIT-3
BIT-2
BIT-1
BIT-0
1
0
1
0
LSR (Receiver Line Status Register)
2
1
0
RXRDY (Receive Data Time-out)
3
0
1
0
RXRDY (Received Data Ready)
4
0
1
0
TXRDY (Transmit Ready)
5
0
MSR (Modem Status Register)
-
0
1
None (default)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M1WXK-1636J | IDC CABLE - MPL16K/MC16G/X |
| RCC18DCAN | CONN EDGECARD 36POS R/A .100 SLD |
| 6278880-3 | C/A 50/125UM RIS MTRJ 3M1 |
| VI-J50-EX | CONVERTER MOD DC/DC 5V 75W |
| VI-B5Y-EV | CONVERTER MOD DC/DC 3.3V 99W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16M554IV64 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO |
| XR16M554IV64-F | 功能描述:UART 接口集成電路 1.62V-3.63V QUAD UART W/ 16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16M554IV80 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO |
| XR16M554IV80-0A-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16M554IV80-0A RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16M554IV80-0B-EB | 功能描述:界面開發(fā)工具 Eval Board for XR16M554IV80-0B RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。