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參數(shù)資料
型號(hào)： XR16L570IL32-F
廠(chǎng)商： Exar Corporation
文件頁(yè)數(shù)： 34/47頁(yè)
文件大?。?/td> 0K
描述： IC UART FIFO 16B 32QFN
標(biāo)準(zhǔn)包裝： 490
特點(diǎn)： *
通道數(shù)： 1，UART
FIFO's： 16 字節(jié)
規(guī)程： RS232，RS422
電源電壓： 1.62 V ~ 5.5 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 32-QFN 裸露焊盤(pán)（5x5）
包裝： 托盤(pán)
XR16L570
4
SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
REV. 1.0.1
NOTE: Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
CD#
-
26
I
UART Carrier-Detect (active low) or general purpose input. This input should be con-
nected to VCC when not used. This input has no effect on the UART. This pin is not
available in the 24-QFN package.
RI#
-
27
I
UART Ring-Indicator (active low) or general purpose input. This input should be con-
nected to VCC when not used. This input has no effect on the UART. This pin is not
available in the 24-QFN package.
ANCILLARY SIGNALS
XTAL1
(CLK)
8
10
I
Crystal or external clock input. This input is not 5V tolerant.
XTAL2
-
11
O
Crystal or buffered clock output. This output may be use to drive a clock buffer which
can drive other device(s). This pin is not available in the 24-QFN package.
PwrSave
7
-
I
Power-Save (active high). This feature isolates the L570’s data bus interface from
the host preventing other bus activities that cause higher power drain during sleep
mode. See Sleep Mode with Auto Wake-up and Power-Save Feature section for
details. This pin is not available in the 28-QFN package.
RESET
17
23
I
This input is the active high RESET signal.
A 40 ns minimum active pulse on this pin will reset the internal registers and all out-
puts of the UART. The UART transmitter output will be held at logic 1, the receiver
input will be ignored and outputs are reset during reset period (see UART Reset Con-
ditions).
VCC
19
28
Pwr
1.62V to 5.5V power supply. All input pins, except CLK, are 5V tolerant.
GND
10
13
Pwr
Power supply common, ground.
GND
Center
Pad
Center
Pad
Pwr
The center pad on the backside of the QFN packages is metallic and should be con-
nected to GND on the PCB. The thermal pad size on the PCB should be the approxi-
mate size of this center pad and should be solder mask defined. The solder mask
opening should be at least 0.0025" inwards from the edge of the PCB thermal pad.
Pin Descriptions
NAME
24-QFN
PIN#
32-QFN
PIN#
TYPE
DESCRIPTION
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