參數(shù)資料
型號(hào)： XR16L2551IM
廠商： EXAR CORP
元件分類： 微控制器/微處理器
英文描述： LOW VOLTAGE DUART WITH POWERSAVE
中文描述： 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQFP48
封裝： 7 X 7 MM, 1 MM HEIGHT, TQFP-48
文件頁(yè)數(shù)： 24/48頁(yè)
文件大小： 287K
代理商： XR16L2551IM
XR16L2551
LOW VOLTAGE DUART WITH POWERSAVE
á
REV. 1.0.0
24
4.3
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
4.3.1
IER versus Receive FIFO Interrupt Mode Operation
When the receive FIFO (FCR BIT-0 = 1) and receive interrupts (IER BIT-0 = 1) are enabled, the RHR interrupts
(see ISR bits 2 and 3) status will reflect the following:
A.
The receive data available interrupts are issued to the host when the FIFO has reached the programmed
trigger level. It will be cleared when the FIFO drops below the programmed trigger level.
B.
FIFO level will be reflected in the ISR register when the FIFO trigger level is reached. Both the ISR register
status bit and the interrupt will be cleared when the FIFO drops below the trigger level.
C.
The receive data ready bit (LSR BIT-0) is set as soon as a character is transferred from the shift register to
the receive FIFO. It is reset when the FIFO is empty.
4.3.2
IER versus Receive/Transmit FIFO Polled Mode Operation
When FCR BIT-0 equals a logic 1 for FIFO enable; resetting IER bits 0-3 enables the XR16L2551 in the FIFO
polled mode of operation. Since the receiver and transmitter have separate bits in the LSR either or both can
be used in the polled mode by selecting respective transmit or receive control bit(s).
A.
LSR BIT-0 indicates there is data in RHR
or
RX FIFO.
B.
LSR BIT-1 indicates an overrun error has occurred and that data in the FIFO may not be valid.
C.
LSR BIT 2-4 provides the type of receive data errors encountered for the data byte in RHR, if any.
D.
LSR BIT-5 indicates Transmit FIFO is empty.
E.
LSR BIT-6 indicates when both the transmit FIFO and TSR are empty.
F.
LSR BIT-7 indicates a data error in at least one character in the RX FIFO.
Interrupt Enable Register (IER) - Read/Write
相關(guān)PDF資料
PDF描述
XR16L2552IJ 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
XR16L2552IM 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
XR16L2552 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
XR16L2750CJ 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16L2551IM-0A-EB 功能描述:UART 接口集成電路 Supports L2551 48 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16L2551IM-0B-EB 功能描述:UART 接口集成電路 Supports L2551 48 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16L2551IM-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16L2551IMTR-F 制造商:Exar Corporation 功能描述:UART 2-CH 16Byte FIFO 2.5V/3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16L2551IMTR-F
XR16L2552 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART WITH 16-BYTE FIFO
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