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參數(shù)資料
| 型號： | XR16L2550IL-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 5/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B DUAL 32QFN |
| 標準包裝： | 490 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232 |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 托盤 |
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XR16L2550
13
REV. 1.1.3
LOW VOLTAGE DUART WITH 16-BYTE FIFO
when data is not received for 4 word lengths as defined by LCR[1:0] plus 12 bits time. This is equivalent to 3.7-
4.6 character times. The RHR interrupt is enabled by IER bit-0.
2.12.1
Receive Holding Register (RHR) - Read-Only
The Receive Holding Register is an 8-bit register that holds a receive data byte from the Receive Shift
Register. It provides the receive data interface to the host processor. The RHR register is part of the receive
FIFO of 16 bytes by 11-bits wide, the 3 extra bits are for the 3 error tags to be reported in LSR register. When
the FIFO is enabled by FCR bit-0, the RHR contains the first data character received by the FIFO. After the
RHR is read, the next character byte is loaded into the RHR and the errors associated with the current data
byte are immediately updated in the LSR bits 2-4.
FIGURE 9. RECEIVER OPERATION IN NON-FIFO MODE
Receive Data Shift
Register (RSR)
Receive
Data Byte
and Errors
RHR Interrupt (ISR bit-2)
Receive Data
Holding Register
(RHR)
RXFIFO1
16X Clock
Receive Data Characters
Data Bit
Validation
Error
Tags in
LSR bits
4:2
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
Receive Data Shift
Register (RSR)
RXFIFO1
16X Clock
E
rro
rT
ags
(1
6-s
ets)
E
rro
rT
ag
s
in
LS
R
bit
s4:2
16 bytes by 11-bit
wide
FIFO
Receive Data Characters
FIFO Trigger=8
Example
:
- RX FIFO trigger level selected at 8 bytes
Data fills to 14
Data falls to 4
Data Bit
Validation
Receive
Data FIFO
Receive
Data
Receive Data
Byte and Errors
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16L2550ILTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 16Byte FIFO 2.5V/3.3V/5V 32-Pin QFN EP T/R 制造商:Exar Corporation 功能描述:XR16L2550ILTR-F |
| XR16L2550IM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16L2550IM-0A-EB | 功能描述:界面開發(fā)工具 Supports L2550 48 ld TQFP, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR16L2550IM-0B-EB | 功能描述:UART 接口集成電路 Supports L2550 48 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L2550IM-F | 功能描述:UART 接口集成電路 2.5V-5.5V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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