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參數(shù)資料
| 型號： | XR16C854 |
| 廠商： | Exar Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| 中文描述： | 四路與異步接收/發(fā)送FIFO的計數(shù)器,128字節(jié)FIFO |
| 文件頁數(shù)： | 29/51頁 |
| 文件大小： | 476K |
| 代理商： | XR16C854 |
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XR16C854
29
Rev. 1.00P
LCR BIT 0-1: (logic 0 or cleared is the default condi-
tion)
These two bits specify the word length to be transmit-
ted or received.
BIT-1
BIT-0
Word length
0
0
1
1
0
1
0
1
5
6
7
8
LCR BIT-2: (logic 0 or cleared is the default condition)
The length of stop bit is specified by this bit in
conjunction with the programmed word length.
BIT-2
Word length
Stop bit
length
(Bit time(s))
0
1
1
5,6,7,8
5
6,7,8
1
1-1/2
2
Table 7, INTERRUPT SOURCE TABLE
Priority
Level
[ ISR BITS ]
Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Source of the interrupt
1
2
2
3
4
5
6
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
1
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time out)
TXRDY ( Transmitter Holding Register Empty)
MSR (Modem Status Register)
RXRDY (Received Xoff signal)/ Special character
CTS, RTS change of state
ISR BIT-0:
Logic 0 = An interrupt is pending and the ISR contents
may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending. (normal default condi-
tion)
ISR BIT 1-3: (logic 0 or cleared is the default condition)
These bits indicate the source for a pending interrupt
at interrupt priority levels 1, 2, and 3 (See Interrupt
Source Table).
ISR BIT 4-5: (logic 0 or cleared is the default condition)
These bits are enabled when EFR bit-4 is set to a logic
1. ISR bit-4 indicates that matching Xoff character(s)
have been detected. ISR bit-5 indicates that CTS,
RTS have been generated. Note that once set to a
logic 1, the ISR bit-4 will stay a logic 1 until Xon
character(s) are received.
ISR BIT 6-7: (logic 0 or cleared is the default condition)
These bits are set to a logic 0 when the FIFO is not
being used. They are set to a logic 1 when the FIFOs
are enabled.
Line Control Register (LCR)
The Line Control Register is used to specify the
asynchronous data communication format. The word
length, the number of stop bits, and the parity are
selected by writing the appropriate bits in this register.
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| XR16C854CJ | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| XR16C854CQ | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C854CJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16C854CJ-0A-EVB | 功能描述:UART 接口集成電路 Supports C854 68 ld PLCC, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C854CJ-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C854CJTR-F | 制造商:Exar Corporation 功能描述:XR16C854CJTR-F |
| XR16C854CQ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
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