參數(shù)資料
型號: XR16C2850
廠商: Exar Corporation
英文描述: 3.3V AND 5V DUART WITH 128-BYTE FIFO
中文描述: 3.3V和5V杜阿爾特128字節(jié)FIFO
文件頁數(shù): 5/43頁
文件大?。?/td> 611K
代理商: XR16C2850
XR16C2850
REV. 2.0.0
3.3V AND 5V DUART WITH 128-BYTE FIFO
á
5
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
CLKSEL
-
-
25
I
Clock Pre-scaler select. Connect to VCC for divide by 1
(default) and GND for divide by 4. MCR[7] can override
the state of this pin following reset or initialization. See
Figure 6 and MCR[7].
CLK8/16
-
-
24
I
Transmit/Receive data sampling rate. Connect to VCC for
normal 16X sampling clock (standard baud rates, default)
or GND for 8X sampling clock to double the standard
baud rates, 2X.
RESET
35
39
36
I
Reset (active high) - A longer than 40 ns logic 1 pulse on
this pin will reset the internal registers and all outputs.
The UART transmitter output will be held at logic 1, the
receiver input will be ignored and outputs are reset during
reset period (see External Reset Conditions).
VCC
40
44
42
Pwr
3.3V or 5V power supply. Please note that the inputs are
not 5V tolerant when operating at 3.3V.
GND
20
22
17
Pwr
Power supply common, ground.
N.C.
none
none
12
No Connection. These pins are open, but typically, should
be connected to GND for good design practice.
N
AME
40-PDIP
P
IN
#
44-PLCC
P
IN
#
48-TQFP
P
IN
#
T
YPE
D
ESCRIPTION
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