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參數(shù)資料
| 型號(hào)： | XR-T7296IW |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DS3/STS-1, E3 Integrated Line Transmitter |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PDSO28 |
| 封裝： | 0.300 INCH, SOJ-28 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 187K |
| 代理商： | XR-T7296IW |
XR-T7296
8
Rev. 2.01
DS3 SIGNAL REQUIREMENTS AT THE DSX
For DS3 operation, pulse characteristics are specified at
the DSX-3, which is an interconnection and test point
referred to as the crossconnect. The crossconnect exists
at the point where the transmitted signal reaches the
distribution frame jack. The DSX-3 interconnection
specification tables list the signal requirements (Table 1)
The XR-T7296 can transmit through 450 feet of 782A
cable to the DSX-3 in DS3 mode.
Currently, two isolated pulse template requirements exist:
the ANSI T1.404 pulse template (See Table 3 and Figure
3) and the Bellcore TR-NWT-000499 pulse template. The
pulse transmitted by the XR-T7296 meets these
templates.
Parameter
Specification
Line Rate
44.736Mbps
20 ppm
Line Code
Bipolar with three-0 substitution (B3ZS)
75
5%
An isolated pulse must fit the template in Figure 3or Figure 4
1
The pulse amplitude may
be scaled by a constant factor to fit the template. The pulse amplitude must be be-
tween 0.36Vpk and 0.85Vpk, measured at the center of the pulse.
Test Load
Pulse Shape
Power Levels
For an all 1s transmitted pattern, the power at 22.368
+5.7dBm, and the power at 44.736
0.002MHz must be -1.8 to
.002MHz must be -21.8dBm to -14.3dBm.
2, 3
Notes
1
The pulse template proposed by G.703 standards is shown in Figure 4 and specified in Table 4 The proposed G.703 standards
further state that the voltage n a time slot containing a 0 must not exceed 5% of the peak pulse amplitude, except for the residue
of preceding pulses.
2
The power evels specified by the proposed G.703 standards are dentical except that the power s to be measured n 3kHz bands.
3
The all 1s pattern must be a pure all 1s signal, without framing or other control bits.
Table 2. DSX–3 Interconnection Specification
Lower Curve
Upper Curve
Time
Equation
Time
Equation
T
-0.36
-0.03
T
-0.68
+0.03
-0.36
T
+0.36
0.5 [1 + sin
π/2
[1 +T/0.18 ]]-0.03
-0.68
T
+ 0.36
0.5[ 1 + sin
π
/2
[1 +T/0.34]]+0.03
0.05+0.407e
-1.84(T-0.36)
+0.36
T
-0.03
+0.36
Table 3. DSX-3 Pulse Template Boundaries for ANSI T1.404 Standards (See Figure 3. )
Lower Curve
Upper Curve
Time
Equation
Time
Equation
-0.85
T
-0.36
-0.03
-0.85
T
-0.68
+0.03
-0.36
T
+0.36
0.5 [1 + sin
π
/2
[1 + T/0.18]] -0.03
-0.68
T
+ 0.36
0.5[ 1 + sin
π
/2
[1 +T/0.34]] +0.03
0.08+0.407e
-1.84(T-0.36)
+0.36
T
+1.4
-0.03
-0.68
T
0.36
Table 4. DSX-3 Pulse Template Boundaries for Bellcore TR-NWT-000499 Standards (See Figure 4)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT7296IW-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI -.5V--6.5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7296IW-F | 制造商:Exar Corporation 功能描述:T3/E3 LIU IC |
| XRT7296IWTR | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7296IWTR-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7298 | 制造商:EXAR 制造商全稱:EXAR 功能描述:DS3/STS-1, E3 INTEGRATED LINE TRANSMITTER |
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