- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372929 > XQ4013E-3HQ191M (Xilinx, Inc.) QPRO XQ4000E/EX QML High-Reliability FPGAs PDF資料下載
參數(shù)資料
| 型號： | XQ4013E-3HQ191M |
| 廠商： | Xilinx, Inc. |
| 元件分類： | FPGA |
| 英文描述： | QPRO XQ4000E/EX QML High-Reliability FPGAs |
| 中文描述： | QPRO XQ4000E/EX QML第高可靠性的FPGA |
| 文件頁數(shù)： | 6/36頁 |
| 文件大小： | 304K |
| 代理商： | XQ4013E-3HQ191M |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
R
XQ4000E Wide Decoder Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer
(TRCE in the Xilinx Develop-
ment System)
and back-annotated to the simulation netlist.
These path delays, provided as a guideline, have been
extracted from the static timing analyzer report. All timing
parameters assume worst-case operating conditions (sup-
ply voltage and junction temperature). Values apply to all
XQ4000E devices unless otherwise noted.
The following guidelines reflect worst-case values over the
recommended operating conditions.
Symbol
Description
(1,2)
Device
-3
-4
Units
Max
Max
T
WAF
Full length, both pull-ups, inputs from IOB I-pins
XQ4005E
-
9.5
ns
XQ4010E
9.0
15.0
ns
XQ4013E
11.0
16.0
ns
XQ4025E
-
18.0
ns
T
WAFL
Full length, both pull-ups, inputs from internal logic
XQ4005E
-
12.5
ns
XQ4010E
11.0
18.0
ns
XQ4013E
13.0
19.0
ns
XQ4025E
-
21.0
ns
T
WAO
Half length, one pull-up, inputs from IOB I-pins
XQ4005E
-
10.5
ns
XQ4010E
10.0
16.0
ns
XQ4013E
12.0
17.0
ns
XQ4025E
-
19.0
ns
T
WAOL
Half length, one pull-up, inputs from internal logic
XQ4005E
-
12.5
ns
XQ4010E
12.0
18.0
ns
XQ4013E
14.0
19.0
ns
XQ4025E
-
21.0
ns
Notes:
1.
2.
These delays are specified from the decoder input to the decoder output.
Fewer than the specified number of pull-up resistors can be used, if desired. Using fewer pull-ups reduces power consumption but
increases delays. Use the static timing analyzer to determine delays if fewer pull-ups are used.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XQ4013E-3HQ191N | QPRO XQ4000E/EX QML High-Reliability FPGAs |
| XQ4013E-4CB191M | QPRO XQ4000E/EX QML High-Reliability FPGAs |
| XQ4013E-4CB191N | QPRO XQ4000E/EX QML High-Reliability FPGAs |
| XQ4013E-4CB196M | Potentiometer Carbon, Single Turn, 2W, 10%, 1.12" (28.45mm) Round Panel Mount, Side Adj., Slotted 7/8" shaft RoHS Compliant: Yes |
| XQ4013E-4CB196N | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XQ4013E-3HQ191N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013E-3HQ196M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013E-3HQ196N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4013E-3HQ240N | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Array (FPGA) |
| XQ4013E-3PG191M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。