• <code id="bqfsm"></code>
  • 參數(shù)資料
    型號: XQ2V6000
    廠商: Xilinx, Inc.
    英文描述: QPro Virtex-II 1.5V Military QML Platform FPGAs
    中文描述: QPro的Virtex - II 1.5V的軍事QML第平臺(tái)FPGA
    文件頁數(shù): 1/128頁
    文件大?。?/td> 2738K
    代理商: XQ2V6000
    DS122 (v1.1) January 7, 2004
    Product Specification
    www.xilinx.com
    1-800-255-7778
    1
    2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
    http://www.xilinx.com/legal.htm
    .
    All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
    Summary of QPro Virtex-II Features
    Industry First Military Grade Platform FPGA Solution
    Certified to MIL-PRF-38535 (Qualified Manufacturer
    Listing)
    100% Factory Tested
    Guaranteed over the full military temperature range
    (–55
    °
    C to +125
    °
    C)
    Ceramic and Plastic Wire-Bond and Flip-Chip Grid
    Array Packages
    IP-Immersion Architecture
    -
    Densities from 1M to 6M system gates
    -
    300+ MHz internal clock speed (Advance Data)
    -
    622+ Mb/s I/O (Advance Data)
    SelectRAM Memory Hierarchy
    -
    2.5 Mb of dual-port RAM in 18 Kbit block
    SelectRAM resources
    -
    Up to 1 Mb of distributed SelectRAM
    resources
    High-Performance Interfaces to External Memory
    -
    DRAM interfaces
    ·
    SDR/DDR SDRAM
    ·
    Network FCRAM
    ·
    Reduced Latency DRAM
    -
    SRAM interfaces
    ·
    SDR/DDR SRAM
    ·
    QDR SRAM
    -
    CAM interfaces
    Arithmetic Functions
    -
    Dedicated 18-bit x 18-bit multiplier blocks
    -
    Fast look-ahead carry logic chains
    Flexible Logic Resources
    -
    Up to 67,584 internal registers/latches with Clock
    Enable
    -
    Up to 67,584 look-up tables (LUTs) or cascadable
    16-bit shift registers
    -
    Wide multiplexers and wide-input function support
    -
    Horizontal cascade chain and sum-of-products
    support
    -
    Internal 3-state busing
    High-Performance Clock Management Circuitry
    -
    Up to 12 DCM (Digital Clock Manager) modules
    ·
    Precise clock de-skew
    ·
    Flexible frequency synthesis
    ·
    High-resolution phase shifting
    -
    16 global clock multiplexer buffers
    Active Interconnect Technology
    -
    -
    Fourth generation segmented routing structure
    Predictable, fast routing delay, independent of
    fanout
    SelectIO-Ultra Technology
    -
    Up to 824 user I/Os
    -
    19 single-ended and six differential standards
    -
    Programmable sink current (2 mA to 24 mA) per
    I/O
    -
    Digitally Controlled Impedance (DCI) I/O: on-chip
    termination resistors for single-ended I/O standards
    -
    PCI compliant (32/33 MHz) at 3.3V
    -
    Differential Signaling
    ·
    622 Mb/s Low-Voltage Differential Signaling I/O
    (LVDS) with current mode drivers
    ·
    Bus LVDS I/O
    ·
    Lightning Data Transport (LDT) I/O with current
    driver buffers
    ·
    Low-Voltage Positive Emitter-Coupled Logic
    (LVPECL) I/O
    ·
    Built-in DDR input and output registers
    -
    Proprietary high-performance SelectLink
    Technology
    ·
    High-bandwidth data path
    ·
    Double Data Rate (DDR) link
    ·
    Web-based HDL generation methodology
    Supported by Xilinx Foundation Series and Alliance
    Series Development Systems
    -
    Integrated VHDL and Verilog design flows
    -
    Compilation of 10M system gates designs
    -
    Internet Team Design (ITD) tool
    SRAM-Based In-System Configuration
    -
    Fast SelectMAP configuration
    -
    Triple Data Encryption Standard (DES) security
    option (Bitstream Encryption)
    -
    IEEE 1532 support
    -
    Partial reconfiguration
    -
    Unlimited reprogrammability
    -
    Readback capability
    0.15 μm 8-Layer Metal Process with 0.12 μm
    High-Speed Transistors
    1.5V (V
    CCINT
    ) Core Power Supply, Dedicated 3.3V
    V
    CCAUX
    Auxiliary and V
    CCO
    I/O Power Supplies
    IEEE 1149.1 Compatible Boundary-Scan Logic
    Support
    0
    QPro Virtex-II 1.5V Military QML
    Platform FPGAs
    DS122 (v1.1) January 7, 2004
    0
    0
    Product Specification
    R
    ds122_1_1.fm Page 1 Wednesday, January 7, 2004 9:15 PM
    相關(guān)PDF資料
    PDF描述
    XQ2V6000-4BG575M QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG575N QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG728M QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG728N QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4CF1144M QPro Virtex-II 1.5V Military QML Platform FPGAs
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    XQ2V6000-4BG575M 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG575N 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG728M 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4BG728N 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs
    XQ2V6000-4CF1144M 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs