參數(shù)資料
型號: XPC850ZT66BU
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 58/76頁
文件大?。?/td> 825K
代理商: XPC850ZT66BU
58
MPC850 (Rev. A/B/C) Hardware Specifications
MOTOROLA
Ethernet Electrical Specifications
Figure 8-53. Ethernet Collision Timing Diagram
Figure 8-54. Ethernet Receive Timing Diagram
133
TENA active delay (from TCLKx rising edge)
10.00
50.00
ns
134
TENA inactive delay (from TCLKx rising edge)
10.00
50.00
ns
138
CLKOUT low to SDACK asserted
2
20.00
ns
139
CLKOUT low to SDACK negated
2
20.00
ns
1
The ratios SyncCLK/RCLKx and SyncCLK/TCLKx must be greater or equal to 2/1.
2
SDACK is asserted whenever the SDMA writes the incoming frame destination address into memory.
Table 8-20. Ethernet Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
CLSN(CTSx)
(Input)
120
RCLKx
121
RXDx
(Input)
121
RENA(CDx)
(Input)
125
124
123
127
126
Last Bit
122
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