參數資料
型號: XCS30-3CS208I
廠商: Xilinx, Inc.
英文描述: Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述: 斯巴達和Spartan - xL的家庭現場可編程門陣列
文件頁數: 2/82頁
文件大小: 623K
代理商: XCS30-3CS208I
Spartan and Spartan-XL Families Field Programmable Gate Arrays
2
www.xilinx.com
1-800-255-7778
DS060 (v1.6) September 19, 2001
Product Specification
R
General Overview
Spartan series FPGAs are implemented with a regular, flex-
ible, programmable architecture of Configurable Logic
Blocks (CLBs), interconnected by a powerful hierarchy of
versatile routing resources (routing channels), and sur-
rounded by a perimeter of programmable Input/Output
Blocks (IOBs), as seen in
Figure 1
. They have generous
routing resources to accommodate the most complex inter-
connect patterns.
The devices are customized by loading configuration data
into internal static memory cells. Re-programming is possi-
ble an unlimited number of times. The values stored in these
memory cells determine the logic functions and intercon-
nections implemented in the FPGA. The FPGA can either
actively read its configuration data from an external serial
PROM (Master Serial mode), or the configuration data can
be written into the FPGA from an external device (Slave
Serial mode).
Spartan series FPGAs can be used where hardware must
be adapted to different user applications. FPGAs are ideal
for shortening design and development cycles, and also
offer a cost-effective solution for production rates well
beyond 50,000 systems per month.
Figure 1:
Basic FPGA Block Diagram
CLB
B-
SCAN
CLB
CLB
CLB
CLB
CLB
Routing Channels
VersaRing Routing Channels
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
IOB
IOB
IOB
IOB
I
I
I
I
I
I
I
I
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
I
I
I
I
I
I
I
I
RDBK
START
-UP
OSC
DS060_01_081100
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