參數(shù)資料
型號(hào)： XCS10XL-5PC84C
廠商： XILINX INC
元件分類(lèi)： FPGA
英文描述： Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述： FPGA, 196 CLBS, 3000 GATES, 250 MHz, PQCC84
封裝： PLASTIC, LCC-84
文件頁(yè)數(shù)： 54/83頁(yè)
文件大?。?/td> 770K
代理商： XCS10XL-5PC84C
Spartan and Spartan-XL FPGA Families Data Sheet
58
DS060 (v1.8) June 26, 2008
Product Specification
R
Spartan-XL Family Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Pin-to-pin timing
parameters are derived from measuring external and inter-
nal test patterns and are guaranteed over worst-case oper-
ating conditions (supply voltage and junction temperature).
Listed below are representative values for typical pin loca-
tions and normal clock loading.
Spartan-XL Family Output Flip-Flop, Clock-to-Out
Symbol
Description
Device
Speed Grade
Units
-5
-4
Max
Global Clock to Output using OFF
TICKOF
Fast
XCS05XL
4.6
5.2
ns
XCS10XL
4.9
5.5
ns
XCS20XL
5.2
5.8
ns
XCS30XL
5.5
6.2
ns
XCS40XL
5.8
6.5
ns
Slew Rate Adjustment
TSLOW
For Output SLOW option add
All Devices
1.5
1.7
ns
Notes:
1.
Output delays are representative values where one global clock input drives one vertical clock line in each accessible column,and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
2.
Output timing is measured at ~50% VCC threshold with 50 pF external capacitive load.
3.
OFF = Output Flip Flop
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