參數(shù)資料
型號： XCR22LV10-10PC28C
廠商： XILINX INC
元件分類： PLD
英文描述： TotalCMOS, Universal PLD Device
中文描述： EE PLD, 10 ns, PQCC28
封裝： PLASTIC, LCC-28
文件頁數(shù)： 3/14頁
文件大?。?/td> 218K
代理商： XCR22LV10-10PC28C
R
XCR22LV10: 3V Zero Power, TotalCMOS, Universal PLD
3
www.xilinx.com
1-800-255-7778
DS047 (v1.1) February 10, 2000
Architecture Overview
The XCR22LV10 architecture is illustrated in Figure. Twelve
dedicated inputs and ten I/Os provide up to 22 inputs and
ten outputs for creation of logic functions. At the core of the
device is a programmable electrically-erasable AND array
which drives a fixed-OR array. With this structure, the
XCR22LV10 can implement up to ten sum-of-products logic
expressions.
Associated with each of the ten OR functions is an I/O mac-
rocell which can be independently programmed to one of
four different configurations. The programmable macrocells
allow each I/O to create sequential or combinatorial logic
functions with either active High or active Low polarity.
AND/OR Logic Array
The programmable AND array of the XCR22LV10 (shown
in the Logic Diagram,
Figure 1
) is formed by input lines
intersecting product terms. The input lines and product
terms are used as follows:
44 input lines:
24 input lines carry the True and Complement of the
signals applied to the 12 input pins
20 additional lines carry the True and Complement
values of feedback or input signals from the ten I/Os
132 product terms:
120 product terms (arranged in two groups of 8, 10, 12,
14, and 16) used to form logical sums
Ten output enable terms (one for each I/O)
One global synchronous preset product term
One global asynchronous clear product term
At each input-line/product-term intersection there is an
EEPROM memory cell which determines whether or not
there is a logical connection at that intersection. Each prod-
uct term is essentially a 44-input AND gate. A product term
which is connected to both the True and Complement of an
input signal will always be FALSE, and thus will not affect
the OR function that it drives. When all the connections on
a product term are opened, a Don't Care state exists and
that term will always be TRUE.
Variable Product Term Distribution
The XCR22LV10 provides 120 product terms to drive the
ten OR functions. These product terms are distributed
among the outputs in groups of 8, 10, 12, 14, and 16 to
form logical sums (see Logic Diagram). This distribution
allows optimum use of device resources.
Programmable I/O Macrocell
The output macrocell provides complete control over the
architecture of each output. the ability to configure each
output independently permits users to tailor the configura-
tion of the XCR22LV10 to the precise requirements of their
designs.
Macrocell Architecture
Each I/O macrocell, as shown in
consists of a
figuration of each macrocell of the XCR22LV10 is deter-
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