
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
DSP56011
Order this document by:
DSP56011/D
MOTOROLA, INC. 1996, 1997
Preliminary Information
This document contains information on a new product. Specifications and information herein are subject to change without notice.
PRELIMINARY
EXTAL
Advance Information
24-BIT DVD DIGITAL SIGNAL PROCESSOR
for Digital Versatile Disc (DVD), High-Definition Television (HDTV), and Advanced Set-top
audio decoding. The DSP56011 is optimized with audio-specific peripherals and customized
memory configuration, and may be programmed with Motorola’s certified software for Dolby
AC-3
5.1 Channel Surround, Dolby Pro Logic, and MPEG1 Layer 2. These applications use
Motorola’s 24-bit DSP56000 architecture and are the highest quality solutions available. Flexible
peripheral modules and interface software allow simple connection to a wide variety of video/
system decoders. In addition, the DSP56011 offers switchable memory space configuration, a
large user-definable Program ROM and two independent data RAMs and ROMs, a Serial Audio
Interface (SAI), Serial Host Interface (SHI), Parallel Host Interface (HI) with Direct Memory
Access (DMA) for communicating with other processors, dedicated I/ O lines, on-chip Phase
Lock Loop (PLL), On-Chip Emulation (OnCE
) port, and on-chip Digital Audio Transmitter
(DAX).
Figure 1
shows the functional blocks of the DSP56011.
Figure 1
DSP56011 Block Diagram
Y Data
Memory
X Data
Memory
Program
Memory
Program Control Unit
24-Bit
DSP56000
Core
OnCE
TM
Port
PLL
Clock
Gen.
8
9
5
2
16-Bit Bus
24-Bit Bus
Data ALU
24
×
24 + 56
→
56-Bit MAC
Two 56-Bit Accumulators
IRQA, IRQB, NMI, RESET
Internal
Data
Bus
Switch
Address
Generation
Unit
PAB
XAB
YAB
GDB
PDB
XDB
YDB
General
Purpose
I/O
(GPIO)
Digital
Audio
Transmitter
(DAX)
Serial
Audio
Interface
(SAI)
Serial
Host
Interface
(SHI)
Parallel
Host
Interface
(HI)
15
Expansion
Area
Program
Address
Generator
Program
Decode
Controller
Program
Interrupt
Controller
AA1271
Rev. 1