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參數(shù)資料
| 型號： | XC6VLX365T-2FFG1156I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA VIRTEX 6 364K 1156FFGBGA |
| 產品培訓模塊： | Virtex-6 FPGA Overview |
| 產品變化通告： | Virtex-6 FIFO Input Logic Reset 18/Apr/2011 |
| 標準包裝： | 1 |
| 系列： | Virtex® 6 LXT |
| LAB/CLB數(shù)： | 28440 |
| 邏輯元件/單元數(shù)： | 364032 |
| RAM 位總計： | 15335424 |
| 輸入/輸出數(shù)： | 600 |
| 電源電壓： | 0.95 V ~ 1.05 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 1156-BBGA，F(xiàn)CBGA |
| 供應商設備封裝： | 1156-FCBGA（35x35） |
Virtex-6 Family Overview
DS150 (v2.4) January 19, 2012
Product Specification
10
Revision History
The following table shows the revision history for this document:
Notice of Disclaimer
The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the
maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect,
special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a
result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the
possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials, or to advise you of any corrections
or update. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products
are subject to the terms and conditions of the Limited Warranties which can be viewed at http://www.xilinx.com/warranty.htm; IP cores
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Critical Applications: http://www.xilinx.com/warranty.htm#critapps.
Date
Version
Description of Revisions
02/02/09
1.0
Initial Xilinx release.
05/05/09
1.1
Added the FF1156 package for both the XC6VSX315T and XC6VSX475T devices in Table2, page3.
Updated the PCI Express design discussion on page 9 to remove the LogiCORE wrapper (<100 LUT)
description and clarify 8 lanes at the 5.0 Gb/s data rate. Clerical edits to Global Clock Lines and
10/100/1000 Mb/s Ethernet Controller (2,500 Mb/s Supported) sections. Overall clarifications made in
text.
06/24/09
1.2
Added ordering information and FPGA documentation sections.
09/16/09
2.0
Added Virtex-6 HXT family information. Updated number to 26 Mb in Configuration section.
11/06/09
2.1
Clarified distributed RAM features on page 1. Updated CLB slice number for the XC6VHX565T in
Table 1. Updated compliance to the PCI Express Base Specification Revision 2.0. Updated Integrated
Interface Blocks for PCI Express Designs section with link to documentation.
01/28/10
2.2
In Table 1, there are two Ethernet MACs in the XC6VHX255T. Under Clock Management, page 5,
revised the VCO frequency minimum to 600 MHz which also revised the phase-shift timing increment.
Updated GTX transceivers operating data rate range to 6.6 Gb/s. Changed GTX PLL input reference
clock frequency divider.
03/24/11
2.3
Changed document classification to Preliminary Product Specification from Advance Product
Specification. Updated Figure 1.
01/19/12
2.4
Changed document classification to Product Specification from Preliminary Product Specification.
Ordering Information (including Figure 1).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XC6VLX365T-2FFG1759C | 功能描述:IC FPGA VIRTEX 6 364K 1759FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 LXT 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA（34.55x34.55） |
| XC6VLX365T-2FFG1759I | 功能描述:IC FPGA VIRTEX 6 364K 1759FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 LXT 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA（34.55x34.55） |
| XC6VLX365T-3FF1156C | 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 FAMILY 364032 CELLS 40NM (CMOS) TECHNOLOGY 1V - Trays 制造商:Xilinx 功能描述:IC FPGA 600 I/O 1156FCBGA |
| XC6VLX365T-3FF1759C | 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 FAMILY 364032 CELLS 40NM (CMOS) TECHNOLOGY 1V - Trays 制造商:Xilinx 功能描述:IC FPGA 720 I/O 1759FCBGA |
| XC6VLX365T-3FFG1156C | 功能描述:IC FPGA VIRTEX 6 364K 1156FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 LXT 產品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA（34.55x34.55） |
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