參數(shù)資料
型號: XC6SLX25-N3FGG484C
廠商: Xilinx Inc
文件頁數(shù): 2/11頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-6 484FBGA
標準包裝: 60
系列: Spartan® 6 LX
LAB/CLB數(shù): 1879
邏輯元件/單元數(shù): 24051
RAM 位總計: 958464
輸入/輸出數(shù): 266
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 484-BBGA
供應(yīng)商設(shè)備封裝: 484-FBGA
Spartan-6 Family Overview
DS160 (v2.0) October 25, 2011
Product Specification
10
Notice of Disclaimer
The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the
maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to
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03/03/10
1.4
Updated the slice counts for the LX25 and LX25T in Table 1. Revised the Dynamic Reconfiguration
Port section. Added to the Spread-Spectrum Clocking section. Changed the PLL VCO maximum
frequency to 1080 MHz and the DSP48A1 slice maximum frequency to 320 MHz due to the addition
of the -4 speed specification. Clarified configurations in the Programmable Data Width section.
Updated Low-Power Gigabit Transceiver operating rate.
08/02/10
1.5
Updated data transfer rate per differential I/O from 1,050 Mb/s to 1,080 Mb/s in Summary of Spartan-6
FPGA Features. Added the -3N speed grade to appropriate section throughout the document,
including Figure 1. Updated category in Table 2 from Size to Body Size. Updated the Configuration
section with SPI and BPI interface information. Removed the Dynamic Reconfiguration Port section.
Updated the operating speed of the DSP48A1 slice multiplier and accumulator to 390 MHz in Digital
11/05/10
1.6
transceiver data rate to 3.2 Gb/s. Updated the notes in Figure 1. Added
DS170, XA Spartan-6
Automotive FPGA Family Overview to the Spartan-6 FPGA Documentation.
03/21/11
1.7
Updated from Advance to Preliminary Specification. Removed -4 speed grade from Summary of
10/25/11
2.0
Updated from Preliminary Specification to Production Specification. Updated Configuration, including
the range of configuration bits to 3 Mb and 33 Mb, and Input and Output Delay. Updated Spartan-6
(DS172) to list of documentation.
Date
Version
Description of Revisions
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參數(shù)描述
XC6SLX25-N3FGG484I 功能描述:IC FPGA SPARTAN-6 484FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan® 6 LX 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)
XC6SLX25-N3FT256C 制造商:Xilinx 功能描述:SPARTAN 6 - Trays 制造商:Xilinx 功能描述:IC FPGA SPARTAN 6 25K 256BGA
XC6SLX25-N3FT256I 制造商:Xilinx 功能描述:SPARTAN 6 - Trays 制造商:Xilinx 功能描述:IC FPGA SPARTAN 6 25K 256BGA 制造商:Xilinx 功能描述:IC FPGA 186 I/O 256FTBGA
XC6SLX25-N3FTG256C 功能描述:IC FPGA SPARTAN-6 256FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan® 6 LX 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)
XC6SLX25-N3FTG256I 功能描述:IC FPGA SPARTAN-6 256FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan® 6 LX 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA(27x27)