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| 型號： | XC68341CFT16 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Integrated Processor Users Manual |
| 中文描述： | 綜合處理器用戶手冊 |
| 文件頁數(shù)： | 10/21頁 |
| 文件大?。?/td> | 134K |
| 代理商： | XC68341CFT16 |
MOTOROLA
MC68341 USER’S MANUAL ADDENDUM
9
25. Additional Note on PORTA/B Output Timing
Add to the External Bus Interface Operation description on page 4-17: The Port A and Port B output pins tran-
sition after the S4 falling edge for the internal write to the respective data register. This places port pin transi-
tions at roughly the same time DS negates for the data register write - note this output delay is not currently
specified in the Electrical Specifications.
26. RTC Memory Map
The RTC register offsets shown on page 4-21 are incorrect - a corrected memory map is shown below. Ad-
dresses within the RTC can be accessed as either bytes or words, with the exception of the reserved byte at
offset $0CE. Note that RTC registers marked S/U are read/write in supervisor mode, but can only be read in
user mode.
27. MBAR Register Reset Values
On page 4-22, the reset values for MBAR bits 31-12 are undefined.
28. MBAR AS7 Bit and IACK Cycles
On page 4-23, the second code sequence initializes the MBAR register with AS7 set. This prevents the ad-
dress decode for the internal 4K register block from responding to CPU space accesses. In particular, it pre-
vents the register block decode of $FFFFFxxx from interfering with IACK cycles (address $FFFFFFFx), and
possibly corrupting the vector number returned. Normal interrupt acknowledge operation for the internal mod-
ules is not affected by this change.
Early versions of the MC68330 User’s Manual (original release) and MC68340 User’s Manual (original and
Rev. 1 releases) did not show AS7 set. Code which was developed based on these manual revisions should
be checked for this problem when porting to the MC68341 - this change should also be applied back to the
MC68330 and/or MC68340.
29. Additional Note on VCO Overshoot
On page 4-30 place the following note under the Y-bits description:
ADDR
FC
15 8
ADDR
FC
7 0
0C0
S
RTC INTERRUPT CONTROL (RICR)
0C2
S/U
MINUTES (MIN)
0C3
S/U
SECONDS (SEC)
0C4
S/U
DATE
0C5
S/U
HOUR
0C6
S/U
MONTH
0C7
S/U
YEAR
0C8
S
RTC CONTROL/STATUS (RCR)
0C9
S/U
DAY
0CA
S/U
MINUTES ALARM (MINA)
0CB
S/U
SECONDS ALARM (SECA)
0CC
S/U
DATE ALARM (DATEA)
0CD
S/U
HOURS ALARM (HOURA)
0CE
-
RESERVED
0CF
S
RTC CALIBRATION (RCCR)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC68341CFT25 | Integrated Processor Users Manual |
| XC68341FT16 | Integrated Processor Users Manual |
| XC68341FT16V | Integrated Processor Users Manual |
| XC68341FT25 | Integrated Processor Users Manual |
| XC68341 | Integrated Processor Users Manual |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC68341CFT25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Processor Users Manual |
| XC68341FT16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Processor Users Manual |
| XC68341FT16V | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Processor Users Manual |
| XC68341FT25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Processor Users Manual |
| XC68704P2S | 制造商:Motorola Inc 功能描述:68704P2S |
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