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參數(shù)資料
| 型號： | XC6601 |
| 廠商： | TOREX SEMICONDUCTOR LTD. |
| 英文描述： | Low Voltage Input LDO Voltage Regulators |
| 中文描述： | 低輸入電壓LDO穩(wěn)壓器 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 257K |
| 代理商： | XC6601 |
8/11
XC6601
Series
<
C
L
High Speed Auto-Discharge
>
XC6601 series can quickly discharge the electric charge at the output capacitor (C
L
) when a low signal to the EN pin which
enables a whole IC circuit put into OFF state, is inputted via the N-channel transistor located between the V
OUT
pin and the V
SS
pin. When the IC is disabled, electric charge at the output capacitor (C
L
) is quickly discharged so that it could avoids malfunction.
At that time, CL discharge resistance is depended on a bias voltage. Discharge time of the output capacitor (C
L
) is set by the C
L
auto-discharge resistance (R) and the output capacitor (C
L
). By setting time constant of a C
L
auto-discharge resistance value [R]
and an output capacitor value (C
L
) as
(
=C x R), the output voltage after discharge via the N channel transistor is calculated
by the following formulas.
V = V
OUT
x e
–t/
, or
ｔ=τ
ln
（
V
OUT(E)
/ V
）
V : Output voltage after discharge, V
OUT(E)
: Output voltage, t: Discharge time,
: C
L
auto-discharge resistance R
Output capacitor (C
L
) value C
<Current Limit, Short-Circuit Protection>
The XC6601 series’ foldback circuit operates as an output current limiter and a short protection of the output pin. When the load
current reaches the current limit level, the fixed current limiter circuit operates and output voltage drops. When the output pin is
shorted to the V
SS
level, current flows about 50mA.
<Thermal Shutdown Circuit (TSD) >
When the junction temperature of the built-in driver transistor reaches the temperature limit level (150
shutdown circuit operates and the driver transistor will be set to OFF. The IC resumes its operation when the thermal shutdown
function is released and the IC’s operation is automatically restored because the junction temperature drops to the level of the
thermal shutdown release temperature (125
TYP.).
TYP.), the thermal
<Under Voltage Lock Out (U.V.L.O.) >
When the V
BIAS
pin voltage drops below 2.0V (TYP.) or V
IN
pin voltage drops below 0.4V (TYP.), the output driver transistor is
forced OFF by U.V.L.O. function to prevent false output caused by unstable operation of the internal circuitry. When the V
BIAS
pin
voltage rise at 2.2V (TYP.) or the V
IN
pin voltage rises at 0.4V (TYP.), the U.V.L.O. function is released. The driver transistor is
turned on in the state and start to operate voltage regulation.
<CE Pin>
The IC internal circuitry can be shutdown via the signal from the CE pin with the XC6601 series. In shutdown mode, output at the
V
OUT
pin will be pulled down to the V
SS
level via R1 & R2. However, as for the XC6601 series, the CL auto-discharge resistor is
connected in parallel to R1 and R2 while the power supply is applied to the V
IN
pin. Therefore, time until the V
OUT
pin reaches the
V
SS
level becomes short.
The CE pin of XC6601A has pull-down circuitry so that CE input current increase during IC operation. The CE pin of XC6601B
does not have pull-down circuitry so that logic is not fixed when the CE pin is open. If the CE pin voltage is taken from V
BIAS
pin
or V
SS
pin then logic is fixed and the IC will operate normally. However, supply current may increase as a result of through current
in the IC's internal circuitry when medium voltage is input.
1. Please use this IC within the stated absolute maximum ratings. The IC is liable to malfunction should the ratings be
exceeded.
2. Where wiring impedance is high, operations may become unstable due to noise and/or phase lag depending on output
current. Please keep the resistance low between V
BIAS
and V
SS
wiring or V
IN
and V
SS
wiring in particular.
3. Please wire the bias capacitor (C
BIAS
), input capacitor (C
IN
) and the output capacitor (C
L
) as close to the IC as possible.
Capacitance values of these capacitors (C
BIAS,
C
IN,
C
L
) are decreased by the influences of bias voltage and ambient
temperature. Care shall be taken for capacitor selection to ensure stability of phase compensation from the point of ESR
influence.
NOTE ON USE
OPERATIONAL EXPLANATION (Continued)
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