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參數(shù)資料
| 型號： | XC651A4AA3VR |
| 廠商： | TOREX SEMICONDUCTOR LTD. |
| 英文描述： | CMOS Low Power Consumption |
| 中文描述： | CMOS低功耗 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 216K |
| 代理商： | XC651A4AA3VR |
676
10
2. MWVD (Positive Logic)
Ta=25
O
C
CIRCUIT
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MW
OUT
1 Detect Voltage
V
DFMW
1
1.250 1.275 1.301
V
5
MW
OUT
2 Detect Voltage
V
DFMW
2
1.220 1.245 1.270
V
5
MW
OUT
3 Detect Voltage
V
DFMW
3
1.186 1.210 1.234
V
5
MW
OUT
4 Detect Voltage
V
DFMW
4
1.039 1.060 1.081
V
5
MW
OUT
1 Hysteresis Width
V
HYSMW
1
(Release Voltage=V
DFMW
1 + V
HYSMW
1)
4
10
-
mV
5
MW
OUT
2 Hysteresis Width
V
HYSMW
2
(Release Voltage=V
DFMW
2 + V
HYSMW
2
)
4
10
-
mV
5
MW
OUT
3 Hysteresis Width
V
HYSMW
3
(Release Voltage=V
DFMW
3 + V
HYSMW
3
)
4
10
-
mV
5
MW
OUT
4 Hysteresis Width
V
HYSMW
4
(Release Voltage=V
DFMW
4 x (1 + V
HYSMW
4 / 100) )
2
-
8
%
5
Supply Current
I
SSMW
MWVD
IN
=2.0V
-
5.0
20.0
μ
A
6
Operating Voltage
MWVD
IN
0.9
-
6.0
V
-
MW
OUT
1 Output Current
I
OUTMW
1
Nch V
DS
=0.5V, MWVD
IN
=0.9V
0.18
1.8
-
mA
7
MW
OUT
2 Output Current
I
OUTMW
2
Nch V
DS
=0.5V, MWVD
IN
=0.9V
0.18
1.8
-
mA
7
MW
OUT
3 Output Current
I
OUTMW
3
Nch V
DS
=0.5V, MWVD
IN
=0.9V
0.18
1.8
-
mA
7
MW
OUT
4 Output Current
I
OUTMW
4
Nch V
DS
=0.5V, MWVD
IN
=0.9V
0.18
1.8
-
mA
7
MW
OUT
1 Delay Time
T
DLYMW
1
Release Voltage Output Inversion, RIP open
-
-
0.4
msec
8
MW
OUT
2 Delay Time
T
DLYMW
2
Release Voltage Output Inversion, RIP open
-
-
0.4
msec
8
MW
OUT
3 Delay Time
T
DLYMW
3
Release Voltage Output Inversion, RIP open
-
-
0.4
msec
8
MW
OUT
4 Delay Time
T
DLYMW
4
Release Voltage Output Inversion, RIP open
-
-
0.4
msec
8
Ripple Rejection Resistance
R
RIP
RIP=1V, MWVD
IN
=0V
250
500
1000
k
9
Special Parameter : V
DFMW
1
≥
V
DFMW
2
≥
V
DFMW
3
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