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參數(shù)資料
| 型號(hào)： | XC62ER5002MR |
| 廠商： | TOREX SEMICONDUCTOR LTD. |
| 英文描述： | Boosting Voltage Regulators |
| 中文描述： | 提高電壓調(diào)節(jié)器 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大小： | 191K |
| 代理商： | XC62ER5002MR |
351
3
XC62EP3002
V
OUT
(T)=3.0V
(Note1)
1. V
OUT
(T)=Specified Output Voltage .
2. V
OUT
(E)=Effective Output Voltage (i.e. the output voltage when "V
OUT
(T)+1.0V" is provided at the V
IN
pin while maintaining a certain I
OUT
value).
3. Vdif= {V
IN
1
(Note5)
-V
OUT
1
(Note4)
}
4. V
OUT
1= A voltage equal to 98% of the Output Voltage whenever an amply stabilised I
OUT
{V
OUT
(T)+1.0V} is input.
5. V
IN
1= The Input Voltage when V
OUT
1 appears as Input Voltage is gradually decreased.
6. The characteristics for those parameters marked with an asterisk* are liable to vary depending on which transistor is used.
Please use a transistor with a low saturation voltage level and h
FE
equal to 100 or more.
7. The maximum output current value is not a value representing continuous output due to the limitations of the 2AS1213 transistor's power
dissipation.
Note:
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SYMBOL
Output Voltage
I
OUT
=50mA
IN
=4.0V
2.940
1000
3.000
3.060
V
Load Stability*
V
IN
=4.0V
mA
I
OUT
max.
Maximum Output Current*
Input-OutputVoltage
Differential
(Note3)
V
IN
=4.0V
1mA
≤
I
OUT
≤
100mA
–
0.2
60
-60
mV
V
OUT
Supply Current1
Supply Current2
I
OUT
=100mA
I
OUT
=50mA
4.0V
≤
V
IN
≤
8.0V
I
OUT
=10mA
–
30
°
C
≤
Topr
≤
80
°
C
100
mV
Vdif
Input Stability*
EXT Output Voltage
EXT Leak Current
CE "High" Level Current
CE "Low" Level Current
Input Voltage
Output Voltage
Temperature Characteristics*
V
IN
=4.0V, V
CE
=V
SS
V
IN
=8.0V,V
CE
=V
IN
50
0.1
±
100
–
0.05
0.6
0.3
8
0.5
0.1
0
μ
A
μ
A
80
%/V
V
ppm/
°
C
V
8
μ
A
μ
A
μ
A
I
SS
1
I
SS
2
V
IN
V
EXT
I
LEAK
1.5
CE "High" Level Voltage
CE "Low" Level Voltage
0.25
V
V
V
CEH
V
CEL
I
CEH
I
CEL
V
CE
=V
IN
V
CE
=V
SS
V
OUT
V
IN
V
OUT
V
OUT
T
opr
V
OUT
Ta=25
°
C
V
OUT
(E)
(Note2)
The characteristics for the XC62ER series are the same as above except for the CE operating logic which is the opposite.
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